#USBPHYIP

[t2mip]

USB 3.0 PHY IP Cores in 16FFC process technology with High performance backplane interconnect licensed to a Chinese company for Multimedia SoC application.

[t2mip]

用 28HPC 工艺技术的 USB 3.2, PCIe 3.1, SATA 3.2 Combo PHY IP

全球独立的半导体 IP 核供应商和技术专业公司 – T2MIP 很高兴地宣布，其合作伙伴的USB 3.2/ PCIe 3.1/ SATA 3.2 Combo PHY IP与相匹配的组合控制器 IP 核的授权已经过28HPC+/HPC 工艺节点的硅验证，并已投入批量生产。

该 Combo PHY 包括符合 USB 3.2（向后兼容高速和全速）的通用串行总线 (USB)、符合 PCIe 3.1 基本规范并支持 PIPE v4.4 接口规格的外围元件互连网 (PCIe) 以及符合 SATA 3.2 规范的串行 ATA (SATA)。该 Combo PHY 可以根据客户的要求在 USB 模式、PCIe 模式或 SATA 模式下运行。这是一种非常可靠且值得信赖的产品，还能通过低成本的内置自检 (BIST) 和模拟/数字接口的近/远端环回发挥强大的测试功能。

凭借其可配置的低功耗模式设置，该 PHY 能广泛适用于各种场景。由于支持额外的嵌入式低抖动 PLL 控制、参考时钟控制和嵌入式电源门控，因此其功耗更低。该 USB 3.2/PCIe 3.1/SATA 3.2 Combo PHY IP 核符合 UTMI 1.05 和 PIPE 4.4 规范。该 USB 3.2 Combo PHY IP 核还能够支持双物理通道宽度和 32 位并行接口。该 Combo PHY IP 核支持 5.0 GT/s 和 10.0 Gt/s (USB)；2.5 GT/s、5.0 GT/s 和8.0 Gt/s (PCIe)；1.5 GT/s、3.0 GT/s 和 6.0 Gt/s (SATA) 的数据传输速率。

该 USB 3.2/PCIe 3.1/SATA 3.2 Combo 控制器 IP 核具有良好的可控性，并能与 PHY 轻松集成。该控制器具有支持同步多输入传输、PTM 实施和批量流的特点，允许通过 PHY 进行高密度数据处理。其还具备一个可配置的 PIPE 接口：可按要求用作 8、16、32 位接口

USB 3.2/PCIe 3.1/SATA 3.2 Combo PHY IP 核与相匹配的控制器 IP 核可独立提供，也可作为完全验证和集成的解决方案预先集成。该 IP 核已被用于半导体行业的智能电视、机顶盒、电脑内存、数据存储、多媒体设备、手机电子和其他全球消费电子产品。

除了  28HPC+ 工艺节点的 USB 3.2/PCIe 3.1/SATA 3.2 Combo PHY IP 核，T2M 广泛的硅接口 IP 核组合包括其他版本的 USB、PCIe、串行 ATA、HDMI、显示端口、MIPI、DDR、1G 以太网、SerDes、SD/eMMC 和更多带有匹配 PHY 的控制器，可在主要工厂的工艺几何尺寸小至 7 纳米。这些产品还可以根据要求被移植到其他晶圆代工厂和前沿制程节点。

可用性：这些半导体接口 IP 核可立即获得许可，既可独立使用，也可与��集成的控制器和 PHY 一起使用。如需了解更多关于许可选件和价格的信息，请发送请求/邮件至

关于 T2M：T2MIP是一家全球性独立半导体技术专业公司，可提供复杂的半导体 IP 核、软件、KGD 和颠覆性技术，帮助您加速开发可穿戴设备、物联网、通信、存储、服务器、网络、电视、机顶盒和卫星 SoC。如需更多信息，请访问：www.t-2-m.com

[t2mip]

USB 3.2, PCIe 3.1, SATA 3.2 Combo PHY IP Core Interface in 28HPC Process Technology

T2MIP, the global independent semiconductor IP Cores provider & Technology experts, is pleased to announce the licensing of its partner’s USB 3.2/ PCIe 3.1/ SATA 3.2 Combo PHY IP Core in 28HPC+/HPC process nodes with matching Combo Controller IP Cores which is silicon proven and in mass production.

The combo PHY consist of Universal Serial Bus (USB) compliant with the USB 3.2 (Backward Compatible with High-speed and Full speed), Peripheral Component Interconnect Express (PCIe) compliant with PCIe 3.1 Base Specification with support of PIPE v4.4 interface spec and Serial ATA (SATA) compliant with SATA 3.2 Specification. The Combo PHY can run on USB mode, PCIe mode or SATA mode as required by the customer. It is a very reliable and trusted product which also provides a robust testability by low-cost Build-In-Self-Test (BIST) and near/far end loopback at analog/digital interface.

The PHY is widely applicable for various scenarios due to its configurable low power mode setting. This low power consumption is achieved due to support of additional Embedded low jitter PLL control, reference clock control, and embedded power gating control. The USB 3.2/ PCIe 3.1/ SATA 3.2 Combo PHY IP Core is compliant with UTMI 1.05 and PIPE 4.4 specifications. The USB 3.2 Combo PHY IP Core is also able to support x2 Physical Lane width and a 32-bit parallel interface. The Combo PHY IP Core supports data transfer rates of 5.0 GT/s and 10.0 GT/s (USB); 2.5 GT/s, 5.0 GT/s and 8.0 GT/s (PCIe); 1.5 GT/s, 3.0 GT/s and 6.0 GT/s (SATA).

The USB 3.2/ PCIe 3.1/ SATA 3.2 Combo Controller IP Core provides a great level of controllability and ensures easy integration with the PHY. With features such as support for simultaneous Multiple IN transfers, PTM Implementation and Bulk Streaming, the Controller allows for a high-density data processing through the PHY. It also boasts a configurable PIPE Interface: 8, 16, 32 bits according to requirements

USB 3.2/ PCIe 3.1/ SATA 3.2 Combo PHY IP Core along with matching Controller IP Cores are available independently or pre-integrated as a fully validated and integrated solution. The IP Core has been used in semiconductor industry’s Smart TV, Set top Box, PC Storage, Data Storage, Multimedia Devices, Cellular Electronics, and other Consumer Electronic products worldwide.

In addition to USB 3.2/ PCIe 3.1/ SATA 3.2 Combo PHY IP Core in 28HPC+ process nodes, T2M ‘s broad silicon Interface IP Core Portfolio includes other versions of USB, PCIe, Serial ATA, HDMI, Display Port, MIPI, DDR, 1G Ethernet, SerDes, SD/eMMC and many more Controllers with matching PHYs, available in major Fabs in process geometries as small as 7nm. They can also be ported to other foundries and leading-edge processes nodes on request.

Availability: These Semiconductor Interface IP Cores are available for immediate licensing either stand alone or with pre-integrated Controllers and PHYs. For more information on licensing options and pricing please drop a request / MailTo

About T2M: T2MIP is the global independent semiconductor technology experts, supplying complex semiconductor IP Cores, Software, KGD and disruptive technologies enabling accelerated development of your Wearables, IOT, Communications, Storage, Servers, Networking, TV, STB and Satellite SoCs. For more information, please visit: www.t-2-m.com

[t2mip]

USB 3.0 PHY IP Cores in 16FFC Process Technology

T2MIP, the global independent semiconductor IP Cores provider & Technology experts, is pleased to announce the licensing of its partner’s USB 3.0 PHY IP with matching Controller IP Cores which is silicon proven and in mass production, to a Chinese company for their High-performance multimedia SoC.

USB 3.0 PHY IP Cores in 16FFC is a transceiver which is provided for peripheral devices. The PHY is compliant with the USB 3.0 (USB SuperSpeed), USB 2.0 PIPE and UTMI specifications. The USB 3.0 PHY IP Cores transceiver is optimized for low power consumption and minimal die area without sacrificing performance and high data throughput. The USB 3.0 PHY IP Cores comprises a complete on-chip physical transceiver solution with Electrostatic Discharge (ESD) protection, built-in self-test module with embedded jitter injection, and a dynamic equalization circuit that ensures full support for high-performance designs.

Compliant with Universal Serial Bus 3.0 Specification the USB 3.0 PHY IP Cores in 16FFC, supports 5.0GT/s and 2.5GT/s serial data transmission rates and is also compliant with PIPE 3.1. The 16FFC process technology is also backward compatible with support for High-speed data transfer rate of 480 Mbps and Full-speed data transfer rate of 12 Mbps. With the support for 16-bit/ 32-bit parallel interface when encode/decode enabled and 20-bit when encode/decode bypassed the IP Cores has low jitter automatically calibrated oscillator for crystal-less mode.

Additional support of the Build-In-Self-Test (BIST) mode for low-cost TEG/ATE testing and flexible reference clock frequency makes the IP Cores highly reliable and is able to achieve a Spread-Spectrum clock (SSC) generation and receiving of 5000ppm to 0ppm. The IP Cores also boasts a low IP area and low power consumption due to programmable transmit amplitude and De-emphasis, Low Frequency Periodic Signalling (LFPS) generation and detection, and a highly efficient L1 sub-state power management system.

USB 3.0 PHY IP Core in 16FFC process technology along with USB 3.0 Host/Device/Hub/OTG Controller IP Cores are available independently or pre-integrated as a fully validated and integrated solution. The IP Core has been used in semiconductor industry’s Cellular Electronics, PC, Data storage (SSDs), Multimedia Devices and other Consumer Electronic products worldwide.

In addition to USB 3.0 PHY IP Cores in 16FFC process nodes, T2M ‘s broad silicon Interface IP Cores Portfolio includes other versions of USB, PCIe, Serial ATA, HDMI, Display Port, MIPI, DDR, 10/100/1000 Ethernet, V by One, programmable SerDes, SD/eMMC and many more Controllers with matching PHYs, available in major Fabs in process geometries as small as 7nm. They can also be ported to other foundries and leading-edge processes nodes on request.

Availability: These Semiconductor Interface IP Cores are available for immediate licensing either stand alone or with pre-integrated Controllers and PHYs. For more information on licensing options and pricing please drop a request / MailTo

About T2M: T2MIP is the global independent semiconductor technology experts, supplying complex semiconductor IP Cores, Software, KGD and disruptive technologies enabling accelerated development of your Wearables, IOT, Communications, Storage, Servers, Networking, TV, STB and Satellite SoCs. For more information, please visit: www.t-2-m.com

[t2mip]

T2M USB 3.1 Host Controllers used in wide range of products such as Graphics Controller, Flash Storage Controllers, SATA Bridges with support for Embedded Hosts, Docking Stations, Mobile Application Processors.