#stm32f4

[y2fear]

Kingham Xu's FryPi Aims to Deliver a Compact Open Source STM32F4 Platform for TinyML Projects

[javakys]

[STM32F4] Introduction to STM32F4 CPP Library from twareLAB

The original text of this article can be found at https://twarelab.com/blog/introduction-to-stm32f4-stm32f4-cpp-library For many embedded system developers, the STM32 series from STMicro can be considered a familiar MCU. One important reason for this is the use of ARM Cortex core and the stability of various peripherals, but the fact that the development environment, including IDE tools and…

[objectivesea]

STM32F401CCU6 Blackpill DFU recovery

If you should happen to "brick" your blackpill dev board in such a way that it doesn't respond to your STLINK v2 debugger anymore, you can recover it by flashing a known-good program via USB Device Firmware Update (DFU) mode.

Every stm32f4 has a built-in DFU bootloader in ROM. To boot into DFU mode, connect the board to your computer via USB (directly, do not use an st-link debugger) hold down the BOOT0 button, and then briefly press the NRST button.

Once in DFU mode, we can flash a known-good program onto it to reset it to a usable-state. I used https://github.com/a5021/STM32F401CCU6-Blink-Bare-Metal/ (`cd ide; make`).

Before we can flash that program, we need to convert the ELF executable into a stm32 proprietary DfuSe format. To do that, I used:

https://github.com/majbthrd/elf2dfuse

cd elf2dfuse

make

./elf2dfuse ../STM32F401CCU6-Blink-Bare-Metal/ide/build/STM32F401CCU6-Blink-Bare-Metal.elf ./out.hex

Now that we have out.hex a DfuSe format binary known-good program for our microcontroller, we just need to flash it over to the board. To flash it, I used dfu-util (`brew install dfu-util`):

dfu-util -a "@Internal Flash /0x08000000/04*016Kg,01*064Kg,01*128Kg" -D ./out.hex

To figure out the exact "@Internal Flash" string to use for that command, run `dfu-util --list` to list the possible dfu targets. They vary slightly between boards (one board I have ended in 03*128Kg, the other 01*128Kg).

That's it. Tap the NRST button to reboot out of DFU mode, and you should see a quick repeating pattern of blinks as the Blink-Bare-Metal program runs.

[aelmaker]

Удобные крепежи на #din рейку для плат. А как крепишь ты? Явно стяжками 🤔😎 . . . #aelmaker #stm32f4 #stm32 #stm32f103 #dinrailmounting #dcdc (Zaporozhye, Ukraine) https://www.instagram.com/p/CM_4TjWLEDu/?igshid=o4dfqvy7me4n

[tsubakicraft]

STM32CubeMxとSystemWorkbench for STM32で割込みを使用してUSARTを動かす

前回はSTM32F4 DiscoveryのUSARTを使ってマイコンからデータを送信するだけの簡単なプログラムを作りました。今回は割込みを使って送受信を行う簡単なプログラムを作ってみました。ソースコードはGitHubに上げておきました。 CubeMXの設定です。 まずはピンアウト。 RCCのHSEとUSART1を変更。PB7にUSART1_RXをPB6にUSART1_TXをアサインしています。 クロックの設定。 USART1のパラメーター設定。 USART1のNVIC（割込み）の設定。 これでSystem Workbench用のプロジェクトを生成します。 System Workbenchでプロジェクトを開き、main.cとstm32f4xx_it.cに修正を加えます。修正内容はGitHubのREADME.mdに書いてあります。修正が終わったらビルドしてエラーがないことを確認。…

[techav]

SE-VGA

I've started a new project.

Inspired by recent work on creating modern reproductions of the Mac SE logic board and following my previous CPLD VGA generator project, I've been working on a PDS card for the Mac SE that mirrors its video on a VGA monitor.

I'm using a similar approach to the [bbraun] project, which used an stm32f4 to watch the SE's CPU bus for writes to the SE frame buffer memory addresses. Instead of using a microcontroller I'm using an Atmel ATF1508AS CPLD to monitor the SE CPU bus for writes to the frame buffer addresses and storing the data in a pair of 32kB SRAM chips. The CPLD then reads back the video data to generate a 640x480 monochrome VGA signal with the SE video in letterboxed in its original 512x342 resolution.

The circuit itself is fairly straightforward. The CPLD runs everything off a single clock signal from a can oscillator, and uses the pair of SRAM chips for video memory. Other than those four chips, there are a few passive components. It's simple enough I could have built one with point-to-point wiring or even wire-wrap. But, to reduce debugging and the potential for noise disrupting the SE's normal operation, I decided to lay out and order some small PCBs.

I got these from JLC for $2 plus shipping and they arrived in just under two weeks. Build was easy enough. I used the drag solder technique with a lot of flux to solder on the 100 pin QFP package CPLD and it went on with no problems. Everything else is through-hole.

I tried to take a methodical approach to build and debug. I started with just the CPLD and clock to make sure it could generate a proper sync signal that was recognized by my monitor. That much worked without issue, so I moved on to testing if it could read data from its VRAM bus and display it. This part took some work with a logic analyzer and a few rounds of updates, but eventually I was able to tie one VRAM Data pin high and get it to display lines.

From there, I added the VRAM sockets to test if it could properly read from VRAM and display its contents. SRAM powers on to random contents, and when I added the SRAM to the board and powered it on, I was greeted with a screen of random pixels. VRAM was working, and the video generator was displaying a stable, consistent image.

At this point there was only one thing left to do — solder on the (expensive!) DIN 41612 connector and test it out in the SE.

Well, it was half working.

I had half of the image on screen, so it was clearly recognizing CPU write cycles, storing it in VRAM, and recalling it in sequence. I quickly found and corrected a bug in the code looking for the 68000 lower data strobe (!LDS), and inverted the final output and tried again.

It ... Wasn't quite right. It started out fine while Mac OS was booting. There was a little noise in the image, but not too bad ... until it reached the Finder. By the time it was finished booting, it was flashing, alternating between valid video data and a garbage data. The garbage data seemed to be encroaching on the valid data as well, the longer the system ran.

The first bug didn't take long to find. The classic Macs, including the SE actually support double-buffered video. They have a primary frame buffer and an alternate frame buffer, selected by setting or clearing one output bit on the VIA chip. I designed the card to support both frame buffers, and to also watch the CPU bus for writes to the specific VIA bit that controls frame buffer selection. I had calculated the VIA address wrong though, so it was swapping between frame buffers when it shouldn't have and that's what was causing the flashing.

I still had the problem of garbage data being displayed however. This one took a while to figure out, and I'm actually still not sure how it was happening to begin with.

The logic analyzer showed that every so often a VRAM write cycle would overlap with a VRAM read cycle. The VRAM write state machine shouldn't have allowed that to happen, but it was. Unable to find anything that would cause the cycles to overlap, o added a test to delay the write cycle if it detected a current read cycle.

The result?

No more garbage data.

I really can't believe it. I wasn't sure I could get this to work, and I wasn't sure it would fit into a CPLD with only 128 macrocells. To top it off, this is my first real project using System Verilog instead of VHDL.

It's not perfect yet. There is one column of garbage data being displayed on the left of the image, and it looks like the last column off the right is also ending up on the left. But, it is completely useable.

I'm not finished with this project yet. I want to bump it up to XGA resolution (1024x768), which would allow the SE video to be pixel doubled and take up more of the screen. The 65MHz clock necessary for XGA is hard to come by, so I'm thinking about spinning up a rev 2 board that uses an FPGA instead of a small CPLD.

This has been a fun project. It's always so exciting for a project to have visible results.

I have the project on GitHub if anyone is interested in taking a closer look.

[eggman-is-fat-mkay]

yeah well everything from a sphero to a cubesat to a corsair light up glowy keyboard uses the same STM32F4 at its heart. the fact that those two products use the same microcontroller doesn't prove anything except that there are a very finite number of good cheap microcontrollers on the market (namely ESP32, the various AVR chips, STM32 series, and the RP2040) and people don't like using the bad ones.

also that since doing a chip erase on an STM32 also clears the security bit, thus making the chips reusable, we will have plenty of devices to salvage should society ever collapse.

those big translucent rabbit vibrators and those big douchebag vape rigs are a sexually dymorphic species

[veworgray]

Cleanflight firmware for stm32f3

#Cleanflight firmware for stm32f3 how to#

#Cleanflight firmware for stm32f3 driver#

#Cleanflight firmware for stm32f3 software#

Ich nutze einen Betaflight F3 als Flight Controler und wollte meine Spektrum DX 6i mit dem Lemon DSM X. Hallo, habe ein Problem mit dem Einrichten meines FPV-Copters. 1 Betaflight installieren und FC einrichten. Erhaltene Likes 10 Beiträge 75 Karteneintrag ja. Flight Controller » Betaflight installieren und FC einrichten 1 Seite 1 von 4 2 3 4 woozler.

#Cleanflight firmware for stm32f3 driver#

So I did a driver change without using ZADIG.

Brand new fc and betaflight won't connect to my fc.

Große Auswahl an ‪Contoller - Große Auswahl, Günstige Preis

#Cleanflight firmware for stm32f3 software#

Baseflight/Cleanflight Software ab und ist Open Source, das heißt der Quellcode ist offen und jeder kann zu dem Projekt beitragen. Betaflight stammt von der 8Bit MultiWii bzw. Die Firmware unterstützt Quadcopter, Hexacopter, Octocopter, Tricopter und teilweise Flächenmodelle. Betaflight ist eine Firmware für diverse Flugsteuerungen (Flight Control - FC).

#Cleanflight firmware for stm32f3 how to#

There are instructions on how to setup your FC for your first flight, and all other related Betaflight tutorials. If you are new to Betaflight, check out my setup guide after you've flashed the firmware. Flashing or updating Betaflight firmware on flight controllers is simple, in this tutorial I will show you the steps and how to troubleshoot problems during flashing. HGLRC FD413 is Suitable For - The HGLRC FD413 is. The package includes an FD411 Flight Controller and an FD13A BLS 4in1 ESC. As you would already know, installing the firmware on the stack is essential for better performance. The F411 Flight Controller stack is compatible with flight controller firmware like Betaflight and Kiss. Tschüss, STM32F3! Aufgrund der Hardwarelimitierung, die Flight Controller. Man will damit Entwicklungsressourcen besser einsetzen und das Projekt auf die Zukunft fokussieren. Die Entwickler des Flight Controller Projektes Betaflight haben bekannt gegeben, dass ab Betaflight Version 4.0 die Unterstützung für Boards mit STM32F3-Prozessor eingestellt wird. Also esc 4 an Motor Ausgang 3 angeschlossen. aber mein Flight Controller kam an und ich hab gleich alles verlötet, als ich dann über Betaflight die Motoren getestet hab ist mir aufgefallen das Motor 4 nicht funktioniert, also nochmal in die Werkstatt und alles gecheckt: nix falsch gelötet oder ähnliches. Sehr guter Flight Controller, mit Betaflight Configurator sehr einfach einzurichten. ESCs are directed using PWM, OneShot, MultiShot, DShot or even ProShot. The Betaflight Firmware supports all major Remote Control manufacturers like FrSky, Graupner and FlySky. The Betaflight Configurator runs on Windows, Mac OS, Linux, and Android. eBay-Garantie Betaflight supports nearly all flight controllers on the market having at least an STM32F4 Processor. Finde ‪Contoller‬! Kostenloser Versand verfügbar. Super Angebote für F4 Flight Controller hier im Preisvergleich Über 80% neue Produkte zum Festpreis Das ist das neue eBay. Vergleiche Preise für F4 Flight Controller und finde den besten Preis. Home Flight controller betaflight F4 Flight Controller - Qualität ist kein Zufal

[this-week-in-rust]

This Week in Rust 483

Hello and welcome to another issue of This Week in Rust! Rust is a programming language empowering everyone to build reliable and efficient software. This is a weekly summary of its progress and community. Want something mentioned? Tag us at @ThisWeekInRust on Twitter or @ThisWeekinRust on mastodon.social, or send us a pull request. Want to get involved? We love contributions.

This Week in Rust is openly developed on GitHub. If you find any errors in this week's issue, please submit a PR.

Updates from Rust Community

* RustConf 2023: Call for Proposals

Official

Language team advisors

Welcome Tyler Mandry to the Rust language team!

Governance Reform RFC Announcement

Project/Tooling Updates

rust-analyzer Changelog #169

Rust now available for Real-Time Operating System and Hypervisor PikeOS

Announcing Relm4 v0.5

Fornjot (code-first CAD in Rust) - Weekly Release - Accidental Side-Effect

Observations/Thoughts

Why is building a UI in Rust so hard?

Lightweight, Predictable Async Send Bounds

Return type notation (send bounds, part 2)

Faking Algebraic Effects and Handlers With Traits: A Rust Design Pattern

winnow = toml_edit + combine + nom

Battle Of The Backends: Rust vs. Go vs. C# vs. Kotlin - inovex GmbH

The Bull Case for Rust on the Web

I love building a startup in Rust. I wouldn't pick it again.

Rust development for the Raspberry PI on Apple Silicon

Rust Walkthroughs

Learn how to build and deploy a down detector Telegram bot in Rust

Compile Time Correctness: Type State

Build a casual side scroller with Rust

True Observer Pattern with Unsubscribe mechanism using Rust

Refactoring in Rust: Abstraction with the Newtype Pattern

Rust to WebAssembly the hard way

STM32F4 Embedded Rust at the PAC: System Clock Configuration

Implement base64 encoding using Rust - (Part 1) Base64 for non-unicode characters

Build a Apache Kafka Producer/Consumer Application in Rust

Learning Rust by Building a To-Do App

A Nibble of Quadtrees in Rust

Embedded Rust on ESP32C3 Board, a Hands-on Quickstart Guide

How to make a Text Adventure game in Rust - X - More Attributes

Nothing in Rust

[ES] Aprendiendo Rust 🦀️ II. Programming a guessing game

[video] Speed up your Rust code with Rayon

[video] Making Custom Asset Types: Platformer In Bevy #4

Implementing a Binary Tree in Rust

Run WebAssembly from your Rust Program

Research

The Usability of Advanced Type Systems: Rust as a Case Study

Miscellaneous

Learn Rust With JetBrains IDEs

Rust in Rhymes II explainer

[audio] Lodestone with Wilbur Zhang, Peter Jiang, and Kevin Huang

Rust Nation UK 2023

Crate of the Week

This week's crate is Darkbird, a high-concurrency real-time in-memory database.

Thanks to DanyalMh for the self-suggestion!

Please submit your suggestions and votes for next week!

Call for Participation

Always wanted to contribute to open-source projects but did not know where to start? Every week we highlight some tasks from the Rust community for you to pick and get started!

Some of these tasks may also have mentors available, visit the task page for more information.

miri - Get Miri working on ARM again

man-in-the-middle-proxy - Add Custom headers requests

Ockam - Create clap command to delete a TCP Outlet on a node

Ockam - Create clap command to delete a TCP Inlet on a node

Ockam - Add a Github Action to avoid conflicts in TypeTag ids

Ockam - Remove the disable/enable_check_credential arguments from ockam tcp-outlet create

Ockam - Remove the disable/enable_check_credential arguments from ockam tcp-inlet create

Ockam - Update ockam project addon configure influx-db clap command to ockam project addon configure influxdb

If you are a Rust project owner and are looking for contributors, please submit tasks here.

Updates from the Rust Project

396 pull requests were merged in the last week

wasm: register the relaxed-simd target feature

enable #[thread_local] on armv6k-nintendo-3ds

add sanitizer support for modern iOS platforms

add kernel-address sanitizer support for freestanding targets

add an unstable #[rustc_coinductive] attribute

added another error to be processed in fallback

check that built-in callable types validate their output type is Sized (in new solver)

implement partial support for non-lifetime binders

deny non-lifetime bound vars in for<..> || closure binders

don't call with_reveal_all_normalized in const-eval when param_env has inference vars in it

don't eagerly convert principal to string

don't recover lifetimes/labels containing emojis as character literals

don't suggest #[doc(hidden)] trait methods with matching return type

make codegen choose whether to emit overflow checks

fix RPITITs in default trait methods (by assuming projection predicates in param-env)

fix json reexports of different items with same name

improve the suggestion on future not awaited

unexpected trait bound not satisfied in HRTB and Associated Type

make dyn*'s value backend type a pointer

more accurate spans for arg removal suggestion

enable CopyProp

enable instcombine for mutable reborrows

factor query arena allocation out from query caches

avoid accessing HIR when it can be avoided

optimize LazyLock size

optimize mk_region

prevent some attributes from being merged with others on reexports

remove save-analysis

rework min_choice algorithm of member constraints

suggest fix for misplaced generic params on fn item

suggest the correct array length on mismatch

tighter spans for bad inherent impl self types

type-directed probing for inherent associated types

use is_str instead of string kind comparison

use target instead of machine for mir interpreter integer handling

use covariance on type relations of field projection types if possible

use derive attributes for uninteresting traversals

use id-based thread parking on SOLID

use restricted Damerau-Levenshtein distance for diagnostics

use semantic equality for const param type equality assertion

constify RangeBounds, RangeX::contains and RangeX::is_empty (where applicable)

implement more methods for vec_deque::IntoIter

use custom implementation of read_buf in Read for &'a FileDesc

futures: add AbortHandle::is_aborted()

cargo: enhance help texts of position args

only include stable lints in rustdoc::all group

rustdoc: perform name resolver cleanups

rustdoc: correctly handle links starting with whitespace

rustdoc: cleanup doc link extraction

rustfmt: use correct span for struct generics

bindgen: add support for enums with the wrapped static functions feature

clippy: add let_underscore_untyped lint

clippy: add question_mark_used lint

clippy: add the transmute_int_to_non_zero lint

clippy: add significant_drop_tightening lint

clippy: significant_drop_tightening: evaluate the return expression of a block

clippy: significant_drop_tightening: ignore inexpensive statements

clippy: fix false positives for extra_unused_type_parameters

clippy: stop bytes_nth from suggesting code that does not compile

clippy: stop doc_markdown requiring backticks on links to external websites

clippy: box_default: don't omit the type of the removed trait object

clippy: manual_let_else: do not suggest semantically different replacements

clippy: manual_let_else: let/else is not divergent by default

clippy: never_loop Fix false positive with labeled blocks

clippy: uninlined_format_args: do not inline argument with generic parameters

clippy: change unusual_byte_groupings to only require byte groupings of equal size

clippy: do not base map_entry lint suggestion on expanded code

clippy: fix needless_return incorrect suggestion when returning if sequence

clippy: ignore synthetic type parameters for extra_unused_type_parameters

clippy: liberate late-bound regions rather than erasing them in needless_pass_by_value

rust-analyzer: add v7 metadata support to rust-analyzer

rust-analyzer: don't assume VSCode internal commands in the server

rust-analyzer: support UTF-32 position encoding

rust-analyzer: adjust binding mode inlay hints to render better with @ patterns

rust-analyzer: bring back hovering call parens for return type info

rust-analyzer: don't expand macros in the same expansion tree after overflow

rust-analyzer: don't trigger postfix completion in if block which has an else block

rust-analyzer: search raw identifiers without prefix

rust-analyzer: trigger call info for more completions of signature having things

Rust Compiler Performance Triage

Overall a fairly positive week, with few noise-related regressions or improvements and many benchmarks showing significant improvements. The one large regression is limited to documentation builds and has at least a partial fix already planned.

Other wins this week include an average improvement of around 1% in maximum memory usage of optimized builds, and a 2% average reduction in compiled binary sizes. These are fairly significant wins for these metrics.

Triage done by @simulacrum. Revision range: 9bb6e60..3fee48c1

3 Regressions, 3 Improvements, 3 Mixed; 2 of them in rollups 45 artifact comparisons made in total

Full report

Approved RFCs

Changes to Rust follow the Rust RFC (request for comments) process. These are the RFCs that were approved for implementation this week:

No RFCs were approved this week.

Final Comment Period

Every week, the team announces the 'final comment period' for RFCs and key PRs which are reaching a decision. Express your opinions now.

RFCs

No RFCs entered Final Comment Period this week.

Tracking Issues & PRs

[disposition: merge] rustdoc: search by macro when query ends with !

[disposition: merge] Stabilize rustdoc --test-run-directory

[disposition: merge] Treat str as containing [u8] for auto trait purposes

New and Updated RFCs

[new] Stabilize may_dangle

[new] Add a [lints] table to Cargo.toml

Call for Testing

An important step for RFC implementation is for people to experiment with the implementation and give feedback, especially before stabilization. The following RFCs would benefit from user testing before moving forward:

No RFCs issued a call for testing this week.

If you are a feature implementer and would like your RFC to appear on the above list, add the new call-for-testing label to your RFC along with a comment providing testing instructions and/or guidance on which aspect(s) of the feature need testing.

Upcoming Events

Rusty Events between 2023-02-22 - 2023-03-22 🦀

Virtual

2023-02-23 | Virtual (Charlottesville, VA, US) | Charlottesville Rust Meetup

Tock, a Rust based Embedded Operating System

2023-02-23 | Virtual (Kassel, DE) | Java User Group Hessen

Eine Einführung in Rust (Stefan Baumgartner)

2023-02-23 | Virtual (México City, MX) | Rust MX

Rust: ¿por qué es una opción adecuada para implantar Blockchain?

2023-02-24 | Virtual (Tunis, TN) | Rust Meetup Tunisia

Rust Meetup Tunisia - Volume I, Number II

2023-02-28 | Virtual (Berlin, DE) | Open Tech School Berlin

Rust Hack and Learn

2023-02-28 | Virtual (Cardiff, UK) | Rust and C++ Cardiff

Rust Nation - What we learnt

2023-02-28 | Virtual (Dallas, TX, US) | Dallas Rust

Last Tuesday

2023-02-28 | Virtual (Munich, DE) | Rust Munich

Rust Munich 2023 / 1 - hybrid

2023-03-01 | Virtual (Indianapolis, IN, US) | Indy Rust

Indy.rs - Michael Baykov on Category Theory & Argument Parsing

2023-03-02 | Virtual (Linz, AT) | Rust Linz

Rust Meetup Linz - 30th Edition

2023-03-07 | Virtual (Buffalo, NY, US) | Buffalo Rust Meetup

First Tuesdays

2023-03-08 | Virtual (Boulder, CO, US) | Boulder Elixir and Rust

Monthly Meetup

2023-03-11 | Virtual | Rust GameDev

Rust GameDev Monthly Meetup

2023-03-14 | Virtual (Berlin, DE) | Berlin.rs

Rust Hack and Learn

2023-03-15 | Virtual (Cardiff, UK) | Rust and C++ Cardiff

Injecting Rust Hooks into a 1999 game binary (unsafe)

2023-03-15 | Virtual (Vancouver, BC, CA) | Vancouver Rust

Rust Study/Hack/Hang-out

2023-03-21 | Virtual (Washington, DC, US) | Rust DC

Mid-month Rustful

Asia

2023-03-04 | Kyoto, JP | Kansai Rust

Fn vs FnMut vs FnOnce

Europe

2023-02-23 | Bordeaux, FR | DedoTalk

#1 DedoTalk 🎙️ : Rust pour un développeur Python

2023-02-23 | Copenhagen, DK | Copenhagen Rust Community

Rust metup #33

2023-02-23 | Vienna, AT | Rust Vienna

Rust Meetup Revived with an Exciting Exploration of Ownership!

2023-02-28 | Munich, DE + Virtual | Rust Munich

Rust Munich 2023 / 1 - hybrid

2023-02-28 | Nijmegen, NL | Rust Nederland

Regular track: Rust at RU

Student track: Rust at RU

2023-03-01 | Cologne, DE | Rust Cologne

Rust traits for Fn and profit

2023-03-02 | Barcelona, ES | BcnRust

9th BcnRust Meetup: Full Stack

2023-03-02 | Wrocław, PL | Rust Wrocław

Rust Wrocław Meetup #32

2023-03-07 | Bratislava, SK | Bratislava Rust Meetup Group

Rust Meetup by Sonalake

2023-03-09 | Basel, CH | Rust Basel

Rust Meetup #7

2023-03-09 | Delft, NL | Rust Nederland

Regular track: Embedded Rust

Student track: Embedded Rust

2023-03-09 | Lyon, FR | Rust Lyon

Rust Lyon Meetup #2

2023-03-15 | Nürnberg, DE | Rust Nuremberg

Walk around Embedded World Exhibition

North America

2023-02-23 | Mountain View, CA, US | Mountain View Rust Study Group

Rust Meetup at Hacker Dojo

2023-03-01 | Austin, TX, US | Rust ATX

Rust Lunch

2023-03-09 | Lehi, UT, US | Utah Rust

Trails, Triumphs, & Travails of Yet-Another-Database-Crate with PJ and Food!

Oceania

2023-02-23 | Brisbane, QLD, AU | Rust Brisbane

February Meetup

2023-02-28 | Canberra, ACT, AU | Canberra Rust User Group

February Meetup

2023-03-01 | Sydney, NSW, AU | Rust Sydney

🦀 Lightning Talks - We are back!

South America

2023-02-22 | Montevideo, UY | Rust Meetup Uruguay

Hands on: Lifetimes

If you are running a Rust event please add it to the calendar to get it mentioned here. Please remember to add a link to the event too. Email the Rust Community Team for access.

Jobs

Please see the latest Who's Hiring thread on r/rust

Quote of the Week

It’s enjoyable to write Rust, which is maybe kind of weird to say, but it’s just the language is fantastic. It’s fun. You feel like a magician, and that never happens in other languages.

– Parker Timmerman cited in a TechnologyReview article

Thanks to robin for the suggestion!

Please submit quotes and vote for next week!

This Week in Rust is edited by: nellshamrell, llogiq, cdmistman, ericseppanen, extrawurst, andrewpollack, U007D, kolharsam, joelmarcey, mariannegoldin, bennyvasquez.

Email list hosting is sponsored by The Rust Foundation

Discuss on r/rust

[javakys]

[STM32F4] STM32F4 CPP Library 소개

이글의 원본은 https://twarelab.com/blog/stm32f4-stm32f4-cpp-library-소개 머리말 많은 임베디드 시스템 개발자들에게 친숙한 MCU는 STMicro의 STM32 시리즈라고 할 수 있다. ARM Cortex Core를 사용하고 다양한 Peripheral이 안정적이라는 점이 중요한 이유이겠지만 무료로 사용할 수 있는 IDE 툴과 Flash 다운로드 툴 등 개발환경 구축에 비용이 들지 않는다는 점도 사용자의 선택을 받는데 도움이 되고 있다. 또한 많은 사용자들이 사용함으로써 참조할만한 예제들이 풍부하고 존재하고 있고 온라인에서 참조할만한 튜토리얼이나 블로그들이 존재한다는 것도 ST MCU를 선택하는 이유이다. 하지만 그만큼 많은 사용자들이 미세한 제어를 하는데…

[tsubakicraft]

STM32CubeMxとSystemWorkbench for STM32でUSARTを使うプログラムの続き

この投稿の続きです。 前回の投稿で書き忘れていた内容と訂正です。 プログラムのテストは、USBシリアル変換アダプターをSTM32F4 DiscoveryのPA2、PA3ピンに接続して行います。 これはプログラム実行の様子。 これはUSBシリアル変換アダプターです。スイッチサイエンスさんの商品です。   USBシリアル変換アダプターのRXとDiscoveryボードのPA2を、TXをPA3にそれぞれ接続します。   動作の確認はターミナルから以下のコマンドを実行して行います。 $ screen /dev/ttyUSB0 9600 前回の投稿ではttyACM0と書きましたが、これはDiscoveryボードが接続されてい���ポートで、USBシリアル変換アダプターはttyUSB0です。

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Two-Thirds of Health Care Organizations Lack Information Governance Strategy

Two-thirds of the responding health care professionals say their organizations do not have a comprehensive information governance (IG) strategy, but having one in place is a critical component in advancing patient care, improving population health and reducing costs, according to AHIMA, who cosponsored a survey on IG with Cohasset Associates.

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In a first-of-its-kind, benchmarking survey of comprehensive IG practices in health care, AHIMA found that 95% of the more than 1,000 respondents said improving the quality and safety of patient care is a key driver for implementing IG.

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A new white paper based on the survey provides an understanding of the state of IG in health care and a roadmap for establishing steps organizations should take to govern their information. Complete results and analysis can be found in the Cohasset Associates/AHIMA 2014 Benchmarking White Paper on Information Governance In Healthcare: A Call to Adopt Information Governance Practices.

“Information governance is a strategic imperative for all organizations within the health care ecosystem,” says AHIMA Chief Operating Officer and Executive Vice President Deborah Green, RHIA, MBA. “Improved quality and patient safety, cost control, care delivery redesign, and responding to regulatory changes are top goals for health care organizations, and all are dependent on trustworthy information.”

The results indicate that there are pockets of strong IG efforts in areas such as privacy and security, but not organizationwide.

Additional findings of the survey include the following:

IG programs are less prevalent and less mature in health care organizations than is warranted, given the importance of health information.

The IG framework and its foundational components call for strengthening and expansion within organizations.

Information lifecycle management practices related to core functions require improvement to ensure the trustworthiness of the information.

Privacy policy and practices are the most developed in health care followed closely by information security policy and practices.

Ninety-seven percent of respondents said essential policies for maintaining private and secure protected personal health information are in place in their organizations. However, only 81% report that business associate agreements are in force and routinely audited.

To prepare for information governance, AHIMA recommends programs that are cross-functional with senior level support. An organization’s governance focus should not be on clinical information alone, but on non-clinical, business and operations information as well.

“I encourage my colleagues in the C-suite to make a comprehensive information governance strategy an organizational priority,” says AHIMA CEO Lynne Thomas Gordon, MBA, RHIA, FACHE, CAE, FAHIMA. “It’s easy to think it can be put on hold or maintained in one department while executives deal with other challenges, but this is a mistake. Developing a strategy should be a collaborative effort and is essential to realizing the benefits of governance.”

To achieve the full benefits of IG, AHIMA recommends the following be addressed:

• an accountability framework and decision rights to ensure the effective use of information, enterprisewide;

• defined processes, skills, and tools to manage information throughout its entire lifecycle; and

• standards, rules, and guidelines for functioning in an increasingly electronic environment.

In addition to publishing a white paper on the survey results, AHIMA is convening health care stakeholders to develop a framework for IG in health care, has established an expert advisory group to review and provide input into IG development efforts, and is developing resources and guidelines to aid in operationalizing IG in health care.

The survey of AHIMA and non-AHIMA members targeted clinical and nonclinical executives, officers, directors, and managers in provider and nonprovider organizations in the health care industry. The survey received more than 1,000 responses between March and April 2014 and was conducted with Cohasset Associates and underwriten in part by Iron Mountain.

Source: AHIMA

Cyberattacks, data breach, privacy of customers, citizens and employees’ personal information, together with the opportunities to create value from data and information held by organisations – are major drivers for organisations to implement a strategic approach to the governance of data and information as part of good corporate governance. Information Governance provides an overarching strategic framework for organisations seeking to control and secure information throughout their organisation, which both maximises the value of information and minimises the costs and risks of holding it.

Twelve months ago, the Director-General of the Australian National Archives called for Chief Information Governance Officer positions to be created to lead the digital transformation in Federal government agencies. This article looks at different Information Governance leadership models being used in corporate and government organisations together with the views of Information Governance leaders in those organisations.

Who is responsible for data and information?

Typically, an organisation’s data and information is managed by various ‘owners’ and will vary according to the industry and organisational structure. In general, responsibility for data and information includes:

Data – Chief Data Officer

Data Analytics – Chief Data Scientist

Customer data – Chief Digital Officer or Chief Marketing Officer

eDiscovery – eDiscovery Counsel or General Counsel

Privacy – Chief Privacy Officer

Information Security – Chief Information Security Officer or Chief Information Officer

Records & Information Management – Records and Information Manager

As the above lists highlights, the digital transformation over the past decade has created new roles and titles responding to the exponential growth of data to manage the risks and opportunities arising from data and information held by organisations. A key challenge for the continuing digital transformation and growth in data is for organisations to have internal organisational structures that align with organisational goals and objectives. In the context of responsibility for data and information, organisations require a cohesive governance structure to ensure data and information are effectively controlled and optimised to enable organisational objectives to be met. This is achieved through a formal Information Governance framework and effective Information Governance leadership.

The benefits of an Information Governance framework

A sound Information Governance framework is the critical foundation that enables organisations to govern and properly manage the information they hold. The benefits of a holistic approach include:

senior-executive-level engagement and decision making on important strategic opportunities and risk mitigation issues concerning organisational information;

increasing revenue and profits through the use of data analytics to develop or improve products or services, and/or through developing strategies to improve efficiencies and reduce costs;

improved management of data, with more efficient retrieval of retained data;

defensible destruction of redundant, outdated and trivial data/information (ROT), with an audit trail that can be relied upon in litigation or regulatory investigation;

improved selection and return on investment (ROI) on new technology, appropriate to the organisation’s legal, compliance and business needs;

comprehensive and aligned policies, processes and response plans – including comprehensive ICT security and privacy frameworks and breach response plans; and

reduced costs and increased efficiencies arising from the implementation of an aligned strategy and policies, in contrast to the inefficiencies of the traditional fragmented siloed approach.

Information Governance leadership

Information Governance leadership is about leading and collaborating with professionals from different disciplines across the ‘information silos’ to align activities and technologies to maximise the value of information while minimising the risks and costs of holding it. With the exponential growth in data and the risks and opportunities of data and information held within an organisation, effective Information Governance is a key factor in delivering strong Information Governance, which is part of good Corporate Governance. The diagram below illustrates the typical areas within an organisation where data and information are managed and governed by policies, procedures, technology and people.

Types of Information Governance leadership

The type of Information Governance leadership will vary between organisations, and are likely to depend on its strategic priorities, size, resources, and the current position of information management within it. Information Governance leadership types include: IG Steering Committee, C-level executive who also takes on responsibility of Information Governance in their portfolio of responsibilities; or a Chief Information Governance Officer

IG Steering committee

The IG Steering Committee is a committee made up of the relevant C-level and other executives and managers responsible for different areas of information and data management.

Ideally, the IG Steering Committee should be chaired by a C-level executive so that there is clear senior executive level support and direction. The direction and overarching strategy for Information Governance should be approved by the Board and CEO, who have ultimate responsibility for the governance of data and information. The Committee is responsible for setting priorities, such as deciding on pilot projects, carrying out reviews of implemented projects etc.

The position titles of the members of the Steering Committee may vary between organisations and will depend on factors such as the size and structure of the organisation and the stage of IG development within the organisation.

The composition of the IG Steering Committee may include the following – General Counsel (GC), Chief Information Security Officer (CISO), Chief Privacy Officer (CPO), Chief Data Officer (CDO), Chief Marketing Officer (CMO), Chief Data Scientist (CDS), Records & Information Manager (RIM) and others appropriate to the needs and priorities of the organisation.

The IG Steering Committee should have a suitable Chair to ensure the Committee:

is collaborative to ensure that those members of the committee lead their respective areas to break down information silos with a culture of information and data collaboration;

is well-structured, meets regularly, and has a clear agenda that is implemented and achieved.

National Archives of Australia

The National Archives has an Information Governance Steering Committee (IGC) which has been assigned by the Director-General to the Archives’ peak governance body, the Executive Board. The terms of reference set out that, ‘(t)he Executive Board added formal responsibility for Information Governance oversight to its role in October 2015 to ensure that the Digital Continuity 2020 Policy is implemented within the Archives and targets for agencies are met’. The National Archives has clear terms of reference for its IGC with defined functions, which provide a useful point of reference for organisations in the process of establishing a Steering Committee.

Steering Committee functions

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The role of the Information Governance Steering Committee is to:

monitor effectiveness of the information governance framework, and all information strategy, policy and architecture documents

ensure coordination of the information governance reporting and external information audits and reviews

identify who is responsible within the organisation for information assets identified in audit and review processes

develop an information management workforce plan with support from the People Management and Development section

monitor information infrastructure according to the organisation’s business information needs

coordinate internal information reviews to identify information assets and their value, manage risk and compliance, and improve business processes

ensure that the organisation’s information is managed for its entire life in accordance with risk, including risks associated with security, access, privacy, continuity, and cost

ensure coordination of information standards implementation, for example, business systems functionality, metadata and interoperability capabilities

C-level executive who is also responsible for IG

This is a current C-level executive, such as a CEO, COO, GC, CPO or CISO who also is responsible for Information Governance. The way in which the organisation structures Information Governance leadership will be determined by its:

strategic priorities, size, structure, resources; and

the stage of Information Governance development within the organisation – that is, whether it is nascent, developing or established.

This model requires the C-level executive to have appropriate leadership skills to work across organisational silos together with sufficient cross-functional expertise to enable them to be an effective Information Governance leader. Determining who will be appropriate to be the overall Information Governance leader will vary from organisation to organisation and will depend on the requirements of the organisation, breadth of cross-functional experience and leadership skills that are determined to be key at the time of the appointment. Types of approaches may include:

CISO with experience in responding to cyberattacks and data breaches, and the identification, retrieval and production of electronic documents and data in litigation and regulatory inquiries. This would be a CISO who is experienced in working in cross-functional teams, including the privacy and legal teams, and understands the demands and requirements involved regulatory responses;

CPO with significant data breach responses and information security/cybersecurity experience. This would be a CPO who works closely with the CISO and IT team, and/or a CPO who works closely with Data Analytic team(s) and/or Product Development team(s);

GC who is experienced in eDiscovery, data breach and broadly understands data analytic technologies and the important opportunities they present to the organisation.

A key issue for the organisation in adding Information Governance leadership responsibilities to the existing responsibilities of the C-level executive is whether they are able to adequately lead Information Governance as well as effectively discharge the responsibilities of their current position. This will depend on whether the additional responsibilities will be supported by the necessary resourcing to support their CIGO role and their current position, and whether they are able to delegate, as appropriate, current responsibilities to ensure they can dedicate sufficient time to their Information Governance responsibilities.

Mastercard

Mastercard implemented an Information Governance program beginning in 2013 to assist with the digital transformation of the organisation at that time. Ms JoAnn Stonier leads the Information Governance and Privacy program for Mastercard on a worldwide basis.

Ms Stonier explains that, ‘MasterCard continually works on building information governance into all of its data and product development efforts. As Mastercards’s business uses of data have changed, our information governance and data privacy team has gone from a team of me to a team of over 40 individuals who are imbedded with our business partners in order to improve our data practices every day. Along the way, we’ve evolved from gate keeping function to one that is more integrated with our business teams which allows us to build and improve our data strategy and develop solutions that enable the growth and advancement of our business.’

Ms Stonier sees the role of Chief Information Governance officer as, ‘leading strategy, building infrastructure, working with regulators, building partnerships, and defining best practices’.

Transpower

Transpower is the owner and operator of New Zealand’s national electricity transmission grid. It also operates the country’s wholesale electricity market. As a critical infrastructure provider, Transpower is part of New Zealand’s earthquake disaster response strategy, requiring a strong focus on accurate real-time asset information for business resilience and the continuing safety of their staff and service providers.

Information Governance is led by the Chief Executive who sets the expectations and behaviours for everyone in the business by acknowledging the essential role data and information plays in underpinning every decision in the business. Transpower business relies heavily on robust records management. Ms Carol Feuerriegel, Enterprise Information Manager explains that, ‘long timeframes (5 to 25 years) for forecasting, planning and constructing transmission electricity infrastructure, combined with rapidly emerging alternative power sources, means Transpower needs to leverage reliable historical data and sophisticated predictive capabilities to make strategic investment decisions for the future’.

Ms Feuerriegel says, ‘ensuring good information and data quality is achieved through Transpower’s Information Governance methodology, includes an internally-consistent information hierarchy, driven from the top-down which identifies accountabilities and decision rights and prioritises the key data elements, core documents, and critical systems required to run the business. This integrated framework of enterprise information assets and accountabilities and the IG methodology becomes the touchstone for all information and data – related decisions.’

Reliability, safety, transparency and auditability are the key drivers in Transpower’s enterprise Information Governance strategy. Ms Feuerriegel explains that, ‘developing effective mechanisms for ensuring authoritative information is available in the right format to everyone who needs it when they need it, requires active participation by every level in the business from the Chief Executive to our people in the field. Given the industry we operate in, our people must be able to trust the information they have available in order to operate safely and efficiently.’

University of Western Australia

Mr Andy Lavender formerly of oil and gas major Chevron and now Associate Director, for Information Governance and Reporting at The University of Western Australia believes the institution has demonstrated a sharper focus by advancing information governance through its Office of Strategy, Planning and Performance. He says, ‘this transformation has provided an opportunity to secure sponsorship at the executive management level.

Mr Lavender is convinced, ‘an ambitious and effective executive sponsor makes all the difference when delivering cross-organisation and organisation-wide programme of works, such as those involving information governance initiatives.’

Designated Chief Information Governance Officer (CIGO)

This is the creation of a new C-level role – the Chief Information Governance Officer. The Information Governance Initiative (IGI), a US IG think-tank describes the CIGO’s role as ‘to balance the stakeholder interests from each facet of IG and develop the right operational model for the organization.’(1)

The Director-General of the National Archives of Australia has called for Federal government agencies to establish a CIGO role to bring people, technology and processes together. Mr David Fricker, Director- General has said,

‘Under its Digital Continuity 2020 policy, the National Archives recognises the role of chief information governance officer as ‘best practice’ for agencies committed to professional information management. As well as leading information governance across an agency, the role is critical for digital innovation and capability, and for championing the importance of effective information management.

An enterprise-wide view will break down silos to create new opportunities to deliver better business outcomes.’

The diagram below illustrates the leadership and co-ordination role of the CIGO to ensure that organisational goals and objectives are met by aligning the areas responsible for data and information throughout the organisation.

What is the CIGO role?

The CIGO is responsible for ensuring that information facets and the various departments responsible for data and information are aligned and working efficiently and effectively to minimise costs and risks and optimising value from information held throughout the organisation.

The National Archives divide the CIGO’s responsibilities into 4 areas – strategic, technical, promotion and engagement. The following table sets out CIGO’s responsibilities – this of course will vary from organisation to organisation and will be impacted by strategic priorities, size, structure and resources.

While the role of the CIGO needs to fit the needs of the organisation, the ability of the CIGO to be an effective leader to work with leaders and those responsible for data and information across the organisation will be key to the success of Information Governance. The CIGO will also need to have the confidence of the Board of Directors and the CEO so that resources and priorities will enable an Information Governance program to be effectively implemented that meets:

legal and regulatory requirements;

organisational standards and values including ethical and socially responsible standards and/or values of the organisation;

overall organisational strategic business goals and objectives.

In conclusion

There are different types of Information Governance leadership models – the key is to select the model that is best suited to your organisation’s needs to enable strategic and cost-effective governance of information and data as well achieve overall organisational objectives.

A well-executed Information Governance framework and program, with appropriate leadership should deliver effective security and control of data and information by minimising risks and reducing costs of holding information and maximising the value of information held by the organisation.

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Effective Information Governance leadership will enable the organisation to deliver continual strategic and proactive governance as digital disruption impacts the organisation and digital transformation continues.

(1) Information Governance Initiative, Annual Report 2014, p28.

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Principal of Sibenco Legal & Advisory and co-founder of Information Governance ANZ

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[this-week-in-rust]

This Week in Rust 487

Hello and welcome to another issue of This Week in Rust! Rust is a programming language empowering everyone to build reliable and efficient software. This is a weekly summary of its progress and community. Want something mentioned? Tag us at @ThisWeekInRust on Twitter or @ThisWeekinRust on mastodon.social, or send us a pull request. Want to get involved? We love contributions.

This Week in Rust is openly developed on GitHub. If you find any errors in this week's issue, please submit a PR.

Foundation

Welcoming Software Engineer Adam Harvey to the Rust Foundation Team

New SLSA++ Survey Reveals Real-World Developer Approaches to Software Supply Chain Security

Newsletters

This Month in Rust OSDev: February 2023 | Rust OSDev

Project/Tooling Updates

autometrics 0.3: Defining Service-Level Objectives (SLOs) in Rust Source Code

Typst starts its public beta test and goes open source

Klint: Compile-time Detection of Atomic Context Violations for Kernel Rust Code

rust-analyzer changelog #173

Gitea 1.19.0 is released

Fornjot (code-first CAD in Rust) - Weekly Release - Finished!

activitypub-federation 0.4.0: Major rewrite with improvements to usability and documentation

Quickwit 0.5: Distributed tracing with Open Telemetry and Jaeger, VRL, Pulsar support, and more...!

pavex, a new Rust web framework - Progress report #2

Observations/Thoughts

Temporary lifetimes

Must move types

Defer blocks and async drop

A template proposal for adopting Rust at work

Patterns & Abstractions

Const as an auto trait

Item Patterns And Struct Else

Why use Rust on the backend?

The Importance of Logging

AsRef vs Borrow trait (ft. ChatGPT)

[audio] Cargo Limit with Alexander Lopatin :: Rustacean Station

[video] The Truth about Rust/WebAssembly Performance

Rust Walkthroughs

Using Cow in Rust for efficient memory utilization

STM32F4 Embedded Rust at the PAC: Creating Hardware Abstractions

STM32F4 Embedded Rust at the PAC: GPIO Interrupts

Build your own Counting Bloom Filter

[video] Setting up CI and property testing for a Rust crate

Research

Verus: Verifying Rust Programs using Linear Ghost Types

Ownership guided C to Rust translation

Optimizing a parser/compiler with data-oriented design: a case study

Miscellaneous

Bringing Rust to the Xen Project

The birth of a package manager [written in Rust ;)]

Crate of the Week

This week's crate is Speedy2D, a crate offering cross-platform Hardware-accelerated drawing of shapes, images, and text, with an easy to use API.

Thanks to Aleksey Kladov for the suggestion!

Please submit your suggestions and votes for next week!

Call for Participation

Always wanted to contribute to open-source projects but did not know where to start? Every week we highlight some tasks from the Rust community for you to pick and get started!

Some of these tasks may also have mentors available, visit the task page for more information.

racoon - Open Source IAM call for contributors

Ockam - create clap command to show the details of a secure-channel listener on a node

Ockam - create clap command to delete an existing Forwarder on a node

Ockam - ockam run - a single command to run many ockam “create” commands

If you are a Rust project owner and are looking for contributors, please submit tasks here.

Updates from the Rust Project

321 pull requests were merged in the last week

inherit_overflow: adapt pattern to also work with v0 mangling

read_buf_exact: on error, all read bytes are appended to the buffer

add enable-warnings flag for llvm, and disable it by default

add useless_anonymous_reexport lint

add note for mismatched types because of circular dependencies

do not ICE for unexpected lifetime with ConstGeneric rib

don't ICE for late-bound consts across AnonConstBoundary

don't suggest similar method when unstable

fix ICE in custom-test-frameworks feature

fix ClashingExternDeclarations lint ICE

emit diagnostic when calling methods on the unit type in method chains

ensure ptr::read gets all the same LLVM load metadata that dereferencing does

erase escaping late-bound regions when probing for ambiguous associated types

error-msg: expand suggestion for unused_def lint

error-msg: impl better suggestion for E0532

fall back to old metadata computation when type references errors

fast path for process_obligations

fix generics_of for impl's RPITIT (Return Position Impl Trait In Trait) synthesized associated type

fix generics mismatch errors for RPITITs on -Zlower-impl-trait-in-trait-to-assoc-ty

install projection from RPITIT to default trait method opaque correctly

make fns from other crates with RPITIT work for -Zlower-impl-trait-in-trait-to-assoc-ty

fix object safety checks for new RPITITs

fix linker detection for clang with prefix

flatten/inline format_args!() and (string and int) literal arguments into format_args!()

implement FixedSizeEncoding for UnusedGenericParams

implement checked Shl/Shr at MIR building

only expect a GAT const param for type_of of GAT const arg

pass the right HIR back from get_fn_decl

remove identity_future indirection

remove box expressions from HIR

replace ZST operands and debuginfo by constants

simplify proc macro signature validity check

some cleanups in our normalization logic

suggest surrounding the macro with {} to interpret as a statement

use unused_generic_params from crate metadata

miri: move reject with isolation logic in fcntl

miri: tree borrows

properly allow macro expanded format_args invocations to use captures

optimize dep node backtrace and ignore fatal errors

fallback to lstat when stat fails on Windows

stabilise unix_socket_abstract

stabilize atomic_as_ptr

use index based drop loop for slices and arrays

allow using Range as an Iterator in const contexts

cargo: accurately show status when downgrading dependencies

cargo: add --ignore-rust-version flag to cargo install

cargo: add more information to wait-for-publish

cargo: align semantics of generated vcs ignore files

cargo: handle case mismatches when looking up env vars in the Config snapshot

rustdoc: correctly merge import's and its target's docs in one more case

rustdoc: docFS: replace rayon with threadpool and enable it for all targets

rustdoc: implement bag semantics for function parameter search

clippy: add allow_attribute lint

clippy: new lint to detect &std::path::MAIN_SEPARATOR.to_string()

clippy: enhance ifs_same_cond to warn same immutable method calls as well

clippy: fix almost_swapped false positive (let mut a = b; a = a)

clippy: fix almost_swapped: Ignore external macros

clippy: issue function modifiers in the right order in manual_async_fn lint

rust-analyzer: add an autofix for inserting an unsafe block to missing unsafe diagnostic

rust-analyzer: prioritize missing variants in match pattern completions

rust-analyzer: allow the status bar item to be clicked again

rust-analyzer: fix reference completions being emitted in places other than argument lists

rust-analyzer: fix rustc proc-macro handling being broken on the rustc workspace itself

rust-analyzer: fix visibility resolution not respecting parent blocks

rust-analyzer: only skip adjustment hints for block, if and match expressions for reborrows

rust-analyzer: lint incoherent inherent impls

Rust Compiler Performance Triage

A mixed week, with some nice wins, but also at least two PR's that were subsequently reverted, such as the upgrade to LLVM 16. We do want to note PR #108944, which cut down on crate metadata, binary sizes, and was an overall win on execution time for many benchmarks.

Triage done by @pnkfelix. Revision range: 00587489..ef03fda3

1 Regressions, 4 Improvements, 11 Mixed; 2 of them in rollups 37 artifact comparisons made in total

Full report here

Approved RFCs

Changes to Rust follow the Rust RFC (request for comments) process. These are the RFCs that were approved for implementation this week:

No RFCs were approved this week.

Final Comment Period

Every week, the team announces the 'final comment period' for RFCs and key PRs which are reaching a decision. Express your opinions now.

RFCs

[disposition: merge] RFC: result_ffi_guarantees

Tracking Issues & PRs

[disposition: merge] Initial support for return type notation (RTN)

[disposition: merge] rustdoc: add support for type filters in arguments and generics

[disposition: merge] rustdoc: run more HIR validation to mirror rustc

[disposition: merge] Add a builtin FnPtr trait that is implemented for all function pointers

[disposition: merge] Clarify stability guarantee for lifetimes in enum discriminants

New and Updated RFCs

No New or Updated RFCs were created this week.

Call for Testing

An important step for RFC implementation is for people to experiment with the implementation and give feedback, especially before stabilization. The following RFCs would benefit from user testing before moving forward:

No RFCs issued a call for testing this week.

If you are a feature implementer and would like your RFC to appear on the above list, add the new call-for-testing label to your RFC along with a comment providing testing instructions and/or guidance on which aspect(s) of the feature need testing.

Upcoming Events

Rusty Events between 2023-03-22 - 2023-04-19 🦀

Virtual

2023-03-22 | Virtual (Richmond, VA, US) | Rustaceans RVA

Rustaceans RVA - March Meetup

2023-03-27 | Virtual | Rust Formal Methods Interest Group

Flux: Ergonomic Verification of Rust Programs with Liquid Types

2023-03-28 | Virtual (Berlin, DE) | Berline.rs - OpenTechSchool Berlin

Rust Hack and Learn

2023-03-28 | Virtual (Dallas, TX, US) | Dallas Rust

Last Tuesday

2023-03-28 | Virtual (Redmond, WA, US) | Microsoft Reactor Redmond

Crack code interview problems in Rust: S2 Ep3

2023-03-29 | Virtual (Cardiff, UK) | Rust and C++ Cardiff

Writing your own rust 'book' with mdBook

2023-03-31 | Virtual (Tunis, TN) | Rust Tunisia

Rust Meetup Tunisia - Volume I, Number III

2023-04-04 | Virtual (Buffalo, NY, US) | Buffalo Rust Meetup

Buffalo Rust User Group, First Tuesdays

2023-04-05 | Virtual (Indianapolis, IN, US) | Indy Rust

Indy.rs - with Social Distancing

2023-04-05 | Virtual (Stuttgart, DE) | Rust Community Stuttgart

Rust-Meetup

2023-04-11 | Virtual (Berlin, DE) | Berline.rs - OpenTechSchool Berlin

Rust Hack and Learn

2023-04-11 | Virtual (Dallas, TX, US) | Dallas Rust

Second Tuesday

2023-04-11 | Virtual | Rust Live

Rust Live: Asynchronous Rust

2023-04-18 | Virtual (Washington, DC, US) | Rust DC

Mid-month Rustful—Introducing duplicate! and the peculiarities of proc macros

2023-04-19 | Virtual (Vancouver, BC, CA) | Vancouver Rust

Rust Study/Hack/Hang-out

Europe

2023-03-28 | Zurich, CH | Rust Zurich

High performance concurrent data structures in Rust - March Meetup

2023-03-29 | Paris, FR | Rust Paris

Rust Paris meetup #57

2023-04-04 | Berlin, DE | Berline.rs

Rust and Tell - Goodbye👋 Edition

2023-04-06 | Lyon, FR | Rust Lyon

Rust Lyon Meetup #3

2023-04-19 | Zurich, CH | Rust Zurich

sett: data encryption and transfer made easy(ier)

Asia

2023-04-08 | Kyoto, JP | Kansai Rust

Demystifying Closures

2023-04-12 | Kuala Lumpur, MY | Rust Malaysia; Telegram

Rust Meetup Malaysia April 2023: How far is Dioxus from React? by Ivan Tham | Map

If you are running a Rust event please add it to the calendar to get it mentioned here. Please remember to add a link to the event too. Email the Rust Community Team for access.

Jobs

Please see the latest Who's Hiring thread on r/rust

Quote of the Week

The generated program is a random sequence of bytes that just happens to take the shape of a seemingly working program by accident. Such is the joy of code that causes UB. You cannot deduce anything from what happens when you execute a program with UB, since that act is by itself meaningless. You need to establish that your program has no UB before making any inference based on what you see the program do after it came out of the compiler.

– Ralf Jung on github

Thanks to bugaevc for the suggestion!

Please submit quotes and vote for next week!

This Week in Rust is edited by: nellshamrell, llogiq, cdmistman, ericseppanen, extrawurst, andrewpollack, U007D, kolharsam, joelmarcey, mariannegoldin, bennyvasquez.

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OV2640 camera module 200W pixels STM32F4 driver source code supports JPEG output

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N€W OV2640 camera module 200W pixels STM32F4 driver source code supports JPEG output

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>>>Manual: Click here to open<<<   Why Choose 401?   In the F401 series, the chip is the cheapest, even cheaper than some F1, and crushed F1 on the main frequency, and has a floating-point ...