#RISC-V processor

[semimediapress]

Codasip seeks buyer amid growing pressure in RISC-V processor market

July 2, 2025 /SemiMedia/ — Germany-based RISC-V processor specialist Codasip has been put up for sale, as the company’s board seeks to complete a transaction within three months, aiming to address mounting competition and funding pressures in the open-architecture CPU sector. Under CEO Ron Black’s leadership, Codasip is exploring options including a full sale or business unit spin-offs. The…

[businesscraftse-blog]

From Sanctions to Self-Reliance: How China is Building Its Own RISC-V Chip Ecosystem

In the rapidly evolving landscape of global technology, semiconductors stand as the cornerstone of modern innovation, powering everything from smartphones to advanced computing systems. China, recognizing the strategic importance of this sector, has embarked on a transformative journey towards semiconductor self-reliance. This shift is not merely a response to external pressures but a calculated…

[utopicwork]

Definitely considering getting a handful of these when they're available at the very least to get some practice with RISC-V processors

[virtualgirladvance]

You're a robot right? What processor architecture are you built on?

Old faithful, x86? Vintage 6502 or z80? 90s classic 68k/PowerPC? One of those efficient ARM chips designed by a trans woman? Or the upcomer, the open source risc-v?

I'm a RISC girlie through and through. Though those new ARM chips look really tempting to port over to ...

Damn I really gotta build something, haven't done anything bare metal in ages 🙃

[govindhtech]

OneAPI Construction Kit For Intel RISC V Processor Interface

With the oneAPI Construction Kit, you may integrate the oneAPI Ecosystem into your Intel RISC V Processor.

Intel RISC-V

Recently, Codeplay, an Intel business, revealed that their oneAPI Construction Kit supports RISC-V. Rapidly expanding, Intel RISC V is an open standard instruction set architecture (ISA) available under royalty-free open-source licenses for processors of all kinds.

Through direct programming in C++ with SYCL, along with a set of libraries aimed at common functions like math, threading, and neural networks, and a hardware abstraction layer that allows programming in one language to target different devices, the oneAPI programming model enables a single codebase to be deployed across multiple computing architectures including CPUs, GPUs, FPGAs, and other accelerators.

In order to promote open source cooperation and the creation of a cohesive, cross-architecture programming paradigm free from proprietary software lock-in, the oneAPI standard is now overseen by the UXL Foundation.

A framework that may be used to expand the oneAPI ecosystem to bespoke AI and HPC architectures is Codeplay’s oneAPI Construction Kit. For both native on-host and cross-compilation, the most recent 4.0 version brings RISC-V native host for the first time.

Because of this capability, programs may be executed on a CPU and benefit from the acceleration that SYCL offers via data parallelism. With the oneAPI Construction Kit, Intel RISC V processor designers can now effortlessly connect SYCL and the oneAPI ecosystem with their hardware, marking a key step toward realizing the goal of a completely open hardware and software stack. It is completely free to use and open-source.

OneAPI Construction Kit

Your processor has access to an open environment with the oneAPI Construction Kit. It is a framework that opens up SYCL and other open standards to hardware platforms, and it can be used to expand the oneAPI ecosystem to include unique AI and HPC architectures.

Give Developers Access to a Dynamic, Open-Ecosystem

With the oneAPI Construction Kit, new and customized accelerators may benefit from the oneAPI ecosystem and an abundance of SYCL libraries. Contributors from many sectors of the industry support and maintain this open environment, so you may build with the knowledge that features and libraries will be preserved. Additionally, it frees up developers’ time to innovate more quickly by reducing the amount of time spent rewriting code and managing disparate codebases.

The oneAPI Construction Kit is useful for anybody who designs hardware. To get you started, the Kit includes a reference implementation for Intel RISC V vector processors, although it is not confined to RISC-V and may be modified for a variety of processors.

Codeplay Enhances the oneAPI Construction Kit with RISC-V Support

The rapidly expanding open standard instruction set architecture (ISA) known as RISC-V is compatible with all sorts of processors, including accelerators and CPUs. Axelera, Codasip, and others make Intel RISC V processors for a variety of applications. RISC-V-powered microprocessors are also being developed by the EU as part of the European Processor Initiative.

At Codeplay, has been long been pioneers in open ecosystems, and as a part of RISC-V International, its’ve worked on the project for a number of years, leading working groups that have helped to shape the standard. Nous realize that building a genuinely open environment starts with open, standards-based hardware. But in order to do that, must also need open hardware, open software, and open source from top to bottom.

This is where oneAPI and SYCL come in, offering an ecosystem of open-source, standards-based software libraries for applications of various kinds, such oneMKL or oneDNN, combined with a well-developed programming architecture. Both SYCL and oneAPI are heterogeneous, which means that you may create code once and use it on any GPU AMD, Intel, NVIDIA, or, as of late, RISC-V without being restricted by the manufacturer.

Intel initially implemented RISC-V native host for both native on-host and cross-compilation with the most recent 4.0 version of the oneAPI Construction Kit. Because of this capability, programs may be executed on a CPU and benefit from the acceleration that SYCL offers via data parallelism. With the oneAPI Construction Kit, Intel RISC V processor designers can now effortlessly connect SYCL and the oneAPI ecosystem with their hardware, marking a major step toward realizing the vision of a completely open hardware and software stack.

Read more on govindhtech.com

[adafruit]

OOOh, some hot new chips just dropped into our mailbox - ESP32-P4! 🔥🚀

Espressif's latest chip has a snazzy eval board, and we just snagged a couple for CircuitPython development. The P4 is a RISC V dual core 400MHz processor with CSI/DSI support, USB HS, and Ethernet too. This chip doesn't have BLE or WiFi like all the other ESP chips. Instead, it uses a low-cost ESP32-C5 module as a wireless co-processor. The eval board is sorta shaped like a Raspberry Pi and has various A/V connections. We also got 100 sample chips of the 16MB in-package PSRAM variety, so we can start designing our first board. Shall we do a Feather? a Metro? maybe a Pi Zero-shaped thingy?

[hydralisk98]

The Cooperative Ocean of Clades (8/?)

Follow-up to this article thread

As you may be well aware by now, I am a GLOSS (Gratis, Libre, Open Source Software) enthusiast of sorts. And as I chatted some to a fellow comrade with many shared special interests, I am even more excited to share what my ambitions / dreams / wishes are as far as tech projects are concerned. They aren't all immediate goals, but they do give insight onto what I aim aiming for as far as my tech career is concerned. (painfully realizing I am... less of a backend, computer networking & low-level-tier individual and more of a... explainer, historian, front-end & data science type of lady)

In a nutshell, I do envision a "life scripting" scene where I operate some embedded 6x8" Common Lisp computer (mixing functionality & aesthetics in a copyleft libre ecosystem) with poetic source files & around a bookstore wearing matte black lipstick & Cloven hoof shoes, with Ava (the ENFP social assistant synthetic-tier android I often mention on Discord as of late) by my side;

The way I do imagine implementing such a imaginary computation REPL "workflow" (or rather, a cyber-deck/deque?) would be through a personalized RISC-V SBC (including perhaps some OpenPOWER co-processor) running KDE e.V Plasma or KDE Liquid as the desktop environment (Konsole, Kate...); (Consider also LTO Tape Storage for Data Archival, Apple M3* iMac with Asahi Linux, AIX-tier Hypervisor...);

Still, while I got a bunch more goals and resources to share, this should be quite sufficient for this very article.

Farewell to soon!

[bitstream24]

Linux Micro Development Board, Integrates ARM Cortex-A7/RISC-V MCU/NPU/ISP Processors

The LuckFox Pico represents a cost-effective Linux micro development board based on the Rockship RV1103 chip, which supplies a straightforward and efficient development platform for embedded system designers. It supports a variety of interfaces, including MIPI CSI, GPIO, UART, SPI, I2C, USB, and more. Developing applications is convenient, and debugging is quick.

[gsmalina]

Nvidia Brings Native CUDA Support to RISC-V CPUs #CUDA #NVidia https://gsmalina.com/?p=25797 post ...

[semimediapress]

GlobalFoundries to Acquire MIPS, Bolstering Semiconductor IP Strategy

July 10, 2025 /SemiMedia/ — GlobalFoundries has announced its intent to acquire processor IP provider MIPS in a strategic move that highlights the current consolidation within the RISC‑V ecosystem. The agreement, pending regulatory approval, is expected to close in the second half of 2025. The acquisition strengthens GlobalFoundries’ portfolio of customizable IP cores and aligns with its…

[geeknik]

The tools of ambient control are now cheap enough to be turned against their operators. A network of distributed, intelligent sensors doesn’t have to serve a central power. ⊗

[fromdevcom]

Speed Demons: Fastest Single Board Computers of 2025 Single Board Computers (SBCs) have rapidly evolved into high-performance platforms capable of rivaling traditional desktops and servers. Whether you're building AI-powered robots, edge servers, or media centers, choosing a fast SBC can significantly accelerate your projects. Here’s a fact-based guide to the fastest single board computers you can get in 2025. NVIDIA Jetson AGX Orin 64GB Developer Kit The NVIDIA Jetson AGX Orin 64GB Developer Kit is undoubtedly one of the fastest SBCs available today. Featuring an Arm Cortex-A78AE CPU cluster and a powerful NVIDIA Ampere GPU with 2048 CUDA cores, it offers 275 TOPS of AI performance. With 64GB LPDDR5 RAM, it supports heavy parallel computing tasks like real-time AI inference, robotics control, and autonomous machine development. Its PCIe Gen4 lanes, 40Gbps Ethernet, and extensive I/O enable seamless integration into industrial systems. Developers can leverage NVIDIA’s comprehensive JetPack SDK to accelerate deep learning, computer vision, and robotics workflows. UDOO Bolt V8 The UDOO Bolt V8 combines desktop-class processing speed with SBC versatility. It houses an AMD Ryzen Embedded V1605B processor with Radeon Vega 8 GPU, making it ideal for graphics-intensive tasks and multitasking. Supporting up to 32GB DDR4 RAM and dual NVMe SSDs, it handles software development, 3D rendering, and machine learning effortlessly. Dual 4K monitor support, USB 3.1, and Gigabit Ethernet make it suitable for professional-grade applications. Thanks to its x86 architecture, it runs Windows, Linux, and popular virtualization tools seamlessly. Orange Pi 5 16GB Rockchip RK3588S The Orange Pi 5 with the Rockchip RK3588S processor offers blazing-fast performance at an affordable price. With its octa-core configuration (4× Cortex-A76 and 4× Cortex-A55) and Mali-G610 GPU, it excels in 8K video playback and AI inference. Up to 16GB LPDDR4 RAM, NVMe SSD support, and dual-display outputs enable smooth multimedia and development workflows. Gigabit Ethernet and multiple USB ports make networking and peripheral management straightforward. It’s a top contender for anyone seeking a fast and versatile SBC without breaking the bank. LattePanda Alpha 800S The LattePanda Alpha 800S is one of the fastest SBCs featuring an Intel Core m3-8100Y processor. Paired with 8GB RAM and 64GB eMMC storage, it delivers excellent processing power for IoT, edge computing, and creative applications. It supports Windows 10 and Linux OS, making it suitable for developers familiar with desktop-class environments. Dual Gigabit Ethernet, USB-C, HDMI, and Arduino co-processor support enhance its versatility for both software and hardware interfacing. Its balance of performance and compactness makes it a standout choice for advanced projects. BeagleBone AI-64 The BeagleBone AI-64 merges industrial-grade reliability with cutting-edge AI acceleration. Powered by the Texas Instruments TDA4VM SoC featuring dual Arm Cortex-A72 cores and embedded AI accelerators delivering up to 8 TOPS, it excels in machine vision, robotics, and industrial automation. With 4GB LPDDR4 RAM and 16GB eMMC storage, it ensures smooth operation for real-time applications. PCIe, USB 3.0, dual Gigabit Ethernet, and compatibility with BeagleBone Capes expand its functionality. Its open-source ecosystem and AI-focused hardware make it a powerful tool for embedded developers. Banana Pi BPI-F3 The Banana Pi BPI-F3 is a forward-looking SBC equipped with an 8-core RISC-V K1 chip. This architecture delivers exceptional performance for edge computing, networking, and embedded AI development. With LPDDR4 RAM support, PCIe expandability, and multiple USB interfaces, it caters to a wide range of demanding applications. Gigabit Ethernet and HDMI outputs further enhance its versatility. Its support for open-source RISC-V toolchains makes it an attractive option for developers exploring alternative architectures.

Radxa Zero 3E The Radxa Zero 3E offers fast processing in an ultra-compact form factor. It features a Rockchip RK3566 quad-core ARM Cortex-A55 processor and up to 8GB LPDDR4 RAM, providing an impressive balance of speed and efficiency. NVMe SSD support via PCIe ensures high-speed data storage, while USB 3.0, HDMI, and Gigabit Ethernet offer ample connectivity options. Its small footprint makes it ideal for portable servers, embedded AI devices, and compact projects. The board's performance and connectivity make it a powerful tool for developers seeking speed in a tiny package. ODROID-N2+ The ODROID-N2+ is a robust SBC designed for fast multimedia and server-grade tasks. Featuring an Amlogic S922X processor (4× Cortex-A73 and 2× Cortex-A53 cores) running at up to 2.4GHz, it handles demanding workloads with ease. Up to 4GB DDR4 RAM, eMMC, microSD, and USB 3.0 support ensure fast data access and storage. HDMI 2.0 output supports 4K HDR video, making it ideal for media centers. Gigabit Ethernet and extensive GPIO expansion options boost its versatility for both makers and developers. MaxHub MT61N-I7 The MaxHub MT61N-I7 is an industrial-grade SBC featuring an Intel Core i7 processor, designed for high-speed computing tasks. With up to 32GB DDR4 RAM and multiple storage interfaces including NVMe and SATA, it excels in data-intensive and enterprise applications. Dual 4K displays, USB 3.2, and dual Gigabit Ethernet ensure exceptional connectivity and multimedia support. It runs both Windows and Linux, making it suitable for professional edge computing, machine learning, and embedded applications. Its rugged design and expansive I/O make it one of the fastest and most versatile SBCs for commercial use.

[hydralisk98]

Short sum for newbie system designer processor steps

Here are a few beginner projects for learning the ropes of customized computation architecture design:

Pana, a '4-4-4' instruction processor derived from Intersil 6100 & GaryExplains' but for 4-bit data. Uses the sixteen (16) RISC instructions shown by GaryExplains and only four (4) of its registers (ACC, PC, LN & MQ) as per of the Intersil 6100 specification. Doing as much work onto nibbles like an MVP Intel 4004 can, great as a BCD & Nibble data converter for later designs.

Tina, a barely expanded '4-4-8' processor derived from the "Pana" design, it uses more registers by adding twelve general-use registers (A-F, U-Z letters) and operate onto a single byte of data at a time. Great for two nibbles operations, byte-wise interoperability and 8-bit word compatibility with all sorts of modern processors from the seventies-onwards.

Milan, a '6-2-24' strong hybrid 8-bit / 12-bit processor derived from the "Tina" design, operating onto three bytes or two tribbles of data at once depending of use-case, while fitting in exactly 32-bit per instruction. Aimed at computing three 8-bit units, enabling 16-bit & 24-bit compatibility as well as up to two tribble operands. A great MVP implementation step towards my next own tribble computing architecture and a competitor to the Jack educational computer as shown in the NAND2Tetris courseware book.

When I am done with such, I will be onto three tribble-oriented architectures for lower-end, middle-end and upper-end "markets". Zara being lower-end (6-bit opcode, 6-bit register & 36-bit data = 48-bit instructions), Zorua being mid-end (8-bit opcode, 8-bit register and 48-bit data = 64-bit instructions) and Zoroark being upper-end (12-bit opcode, 36-bit register and 96/144-bit data (so either eight or twelve tribble operands worth of data) = 144/192-bit instructions, aiming to emulate close enough to an open-source IBM's PowerISA clone with VLIW & hot-swap computer architecture).

By the way, I haven't forgotten about the 16^12 Utalics game consoles and overall tech market overview + history specifications, nor have I forgotten about studying + importing + tinkering around things like Microdot & Gentoo & Tilck. I simply need to keep a reminder to myself for what to do first when I shall start with the computation engineering process. Hopefully that might be interesting for you to consider as well... Farewell!

EDIT #1

Tweaked and added some additional text & considering studying various aspects of Linux and overall copyleft / open source culture engineering scene, especially over Gentoo alternative kernels & hobby / homebrew standalone operating systems (GNU Hurd, OpenIndiana, Haiku... as well as niche ones like ZealOS, Parade, SerenityOS...) as to design a couple computation ecosystems (most derived from my constructed world which takes many hints from our real-life history) and choosing one among them to focus my implementation efforts onto as the "Nucleus" hybrid modular exo-kernel + my very own package modules collection. (Still aiming to be somewhat compatible with existing software following Unix philosophy principles too as to ease the developer learning cost in initial infrastructure compatibility & overall modularized complexity; Might also use some manifestation tips & games to enrich it with imports from said constructed world if possible)