#GPIO Extender

[mlembug]

Relay operated power button

What you need:

a 5V relay module

Raspberry Pi

a bunch of cables

Explanation:

A power button on a computer case lets electricity flow between two power pins upon it being pressed, which is when the motherboard detects the button is pressed and reacts accordingly.

A relay is a specific kind of switch which lets electricity flow conditionally upon the flow of electricity in another circuit. The voltages involved both in motherboard power pins and on Raspberry Pi are generally low to not damage both, but we're taking extra precautions to electrically separate them both.

"5V relay module" here means that 5V is the voltage that is required for the relay module to work, while the controlling voltage can be lower. It being relay module it means it also has a flyback diode we'd otherwise have to provide ourselves.

Raspberry Pi's GPIO pins are programmable and can be controlled through Python code, and operate on 3.3V. Raspberry Pi also provides 5V output, but this one is not controllable.

By

connecting a power button to rPi GPIO pins

connecting the 5V voltage output pin from rPi to the relay module's Vcc input pin

connecting the ground pin from rPi to the relay module's groud pin

connecting programmable GPIO pins as the relay module's input pin

connecting the relay module's outputs (the normally open one and the ground) to the motherboard power pins

running some code on rPi

We can extend the power button functionality so Raspberry Pi can turn on and off our computer, while also still keeping the power button working.

Which is what I use to remotely turn on my computer on, by SSHing to rPi and running a script to turn the PC on while I'm away from home.

Why not Wake-On-LAN?

Wake-On-LAN has restrictions which makes it not as reliable as it could be, for example:

The ability to wake from a hybrid shutdown state (S4) (aka Fast Startup) or a soft powered-off state (S5) is unsupported in Windows 8 and above

The code and explanation for it in Part 2, when I get to writing it.

[bliiot]

ARM Embedded Controllers ARMxy in Building Fire Protection Systems

Main Application Scenarios

Fire Detection and Alarming: ARM controllers integrate sensors (e.g., smoke, temperature, gas sensors) to monitor environmental data in real-time, using algorithms to assess fire risks and trigger alarms.

Fire Equipment Control: Manage fire pumps, sprinkler systems, fire doors, smoke exhaust fans, etc., ensuring rapid response during a fire.

Communication and Networking: Support multiple communication protocols (e.g., Modbus, CAN, Ethernet, 4G, Wifi) for connectivity with fire control centers, cloud platforms, or other smart devices.

Data Processing and Storage: Process large amounts of sensor data and log events for post-incident analysis and system optimization.

Human-Machine Interaction: Drive displays or touchscreens to provide status monitoring and operation interfaces for fire protection systems.

Emergency Power Management: Manage backup power sources (e.g., UPS or batteries) to ensure system operation during power outages.

Advantages of ARM Embedded Controllers ARMxy series

High Performance and Low Power Consumption: ARM Cortex-M series (e.g., Cortex-M4, M7) or Cortex-A series offer strong computing power while maintaining low energy consumption, ideal for continuous operation in fire systems.

Rich Peripheral Support: ARMxy series Integrated RS485, GPIO, DI, DO, AI, AO. RS232, CAN, RTD, etc., facilitate connections to various sensors and actuators.

Real-Time Capability: Support real-time operating systems (RTOS, e.g., FreeRTOS, uC/OS) to ensure low-latency fire detection and response.

Scalability: ARMxy series supports modular design, enabling easy system upgrades or feature expansions.

Cost-Effectiveness: ARM chips are relatively affordable, suitable for large-scale deployment in building fire systems.

Security: Support encryption modules and secure boot to prevent malicious tampering, ensuring system reliability.

Typical Implementation Cases

Smoke Alarm System: Use ARM Cortex-A7 controllers BL330 with smoke sensors, collecting data via DI/AI to trigger buzzers or networked alarms.

Smart Fire Hydrant Monitoring: ARM controllers monitor hydrant water pressure and status, uploading data to the cloud via Ethernet, 4G or WiFi.

Building Fire System Integration: Cortex-A55 controllers BL410 running Linux integrate video surveillance, fire alarms, and evacuation guidance for comprehensive management.

Development Considerations

Reliability: Fire systems require 24/7 operation; select industrial-grade ARM chips to ensure high temperature resistance and anti-interference.

Redundancy Design: Include backup controllers or communication channels to prevent single-point failures.

Certification Standards: Ensure compliance with fire protection standards.

Power Optimization: Use sleep modes or dynamic frequency scaling to reduce energy consumption and extend device lifespan.

Software Security: Regularly update firmware to mitigate potential cyberattacks.

Summary

ARM embedded controllers, with their high performance, low power consumption, and flexibility, have become core components of building fire protection systems. Through proper chip selection and design, they enable efficient and reliable fire detection, equipment control, and emergency response, significantly enhancing building fire safety.

[govindhtech]

MS-CF20 ATX Motherboard for Intel Arrow Lake-S CPUs

MS-CF20: Next-Gen ATX Motherboard with 15th Gen Intel Arrow Lake-S Processors and Legacy Support

Strong ATX motherboard MS-CF20 supports 15th-generation Intel Arrow Lake-S Series CPUs and has the Intel W880 chipset. By supporting next-generation CPUs and legacy capabilities, the MS-CF20 provides unsurpassed versatility for current and older systems to meet the needs of advanced computing applications.

Power and performance optimised

For Intel Core U9/U7/U5, Pentium, and Celeron CPUs, the MS-CF20 uses the latest Intel 15th Gen Arrow Lake-S technology. New processors perform well in demanding and AI-driven applications because to their greater core counts, instructions per clock, and energy efficiency.

The board's four DDR5 UDIMM slots provide ECC and non-ECC memory up to 5600 MT/s and 192GB, giving data-intensive applications unsurpassed performance.

Advanced Graphics and Displays Support

VGA, DisplayPort (DP), and HDMI monitors make multitasking and visualisation easier on the MS-CF20. This makes it perfect for digital signage, control centres, and industrial automation with several high-resolution panels.

Good Network and Storage Connectivity

Four RJ-45 2.5GbE LAN ports on MS-CF20 provide server-grade and data processing networking. The board has four SATA 3.0 ports, two M.2 M Key slots, and SATA RAID 0/1/5/10 for safe data management.

Extended Expansion and I/O Interfaces

To satisfy various application needs, the MS-CF20 offers these features:

Accelerators, GPUs, and networks fit in one PCIe x16 (Gen 5) or two x8 and four x4 slots.

Two USB 3.2 Gen 1 ports, three USB 2.0 ports, and eight USB 3.2 Gen 2 connections connect fast peripherals.

Industrial-grade serial connectivity options include 10 COM ports (2 RS-485, 8 RS-232).

Audio connections, PS/2, GPIO, and TPM 2.0 for security are included.

Supporting Legacy

PS/2 Port: This port enables vintage keyboards and mice in industrial and automation situations that require reliability and low latency input.

PCI Slot: Supports legacy expansion cards for automation, legacy hardware support, and industrial control systems.

VGA connectors work with old displays and projectors in control systems, factory automation, and long-lifecycle applications.

Ten serial COM ports (one back and nine inside): COM1/2 supports Ring/0V/5V/12V Autoflow (default, Ring) for RS-232/422/485. The COM3-10 supports RS-232 with 0V/5V/12V Autoflow for diverse serial connection and industrial compatibility.

Reliability and Industry Standards

For reliable remote administration and monitoring, the MS-CF20 uses cutting-edge SMBus, I2C, PMBus, and Intel AMT 19.x technologies. Multi-system fan connections improve thermal management, and chassis intrusion detection provides physical security.

Key MS-CF20 Features

15th-generation Arrow Lake-S CPUs with Intel W880 chipset

4 DDR5 ECC/non-ECC UDIMM slots, 192GB.

HDMI, DP, and VGA displays.

Quad 2.5GbE LAN ports

Flexible Gen 5 and Gen 4 PCIe extension

Four SATA 3.0 and two M.2 M slots support RAID.

Built-in TPM 2.0, COM ports, GPIO, PS/2, USB 3.2, and PCI slot.

Previous PCI, VGA, COM, and PS/2 support.

ATX Power's advanced thermal and security features

Target Uses

The MS-CF20 supports high-performance computing systems like:

Production lines, process automation, and industrial machinery may be managed and monitored by industrial automation and control systems.

Real-time processing and analysis of massive amounts of data need data processing servers.

Transport Systems: Connects fleet, traffic, and logistical systems reliably.

Security and surveillance platforms: Powers analytics, real-time monitoring, and HD video streaming.

Medical imaging and data processing provide fast, accurate processing of medical imaging data for healthcare systems and diagnostics.

For intelligent edge and Internet of Things applications, Edge AI and Machine Learning Systems provide AI inference and real-time data processing.

Robotics and autonomous vehicles: Provides high-performance computing for real-time decision-making, automation, and navigation.

Helps manage resources in smart infrastructure, grid control, and energy monitoring.

Broadcast and streaming servers: Ensure reliable content distribution, live streaming, and high-bandwidth media delivery.

old System Integration: Integrates old devices, displays, and peripherals via PS/2, PCI, and VGA to extend industrial and corporate system lifetimes.

The MS-CF20 provides performance, connection, and dependability for today's most demanding applications while maintaining industrial historical compatibility.

[codingprolab]

ECSE444 Lab 3: DAC, Timers, Interupts, DMA and Analog Interfacing

This exercise will extend the use of GPIOs and will employ the DAC and the buzzer (speaker) to generate observable audio outputs. You will also practice the use of a timer (TIM), interrupts and finally the DMA. The lab will be done in two parts, with the second part building on the success of the first one. This exercise relies on the previous laboratory exercises, the classes and tutorials, and…

[codeshive]

Solved This exercise will extend the use of GPIOs and will employ the DAC and the buzzer (speaker) to generate observable audio outputs.

This exercise will extend the use of GPIOs and will employ the DAC and the buzzer (speaker) to generate observable audio outputs. You will also practice the use of a timer (TIM), interrupts and finally the DMA. The lab will be done in two parts, with the second part building on the success of the first one. This exercise relies on the previous laboratory exercises, the classes and tutorials, and…

[forlinx]

3D Scanner System Solution Based on FET3576-C Embedded Board

3D scanning, an integrated technology of optics, mechanics, electronics, and computing, captures 3D coordinates and color information of object surfaces through non-contact measurement, generating high-precision 3D models. In game development, 3D scanners have significantly enhanced the realism and detail richness of game scenes, characters, and objects.

The production team of the popular game "Black Myth: Wukong" spent a year using 3D scanning to create precise 3D models of real Buddhist statues, temples, and rocks across China. These models not only provide rich materials and inspiration for game designers but also ensure the authenticity and detail richness of game scenes. By capturing real-world 3D data, every detail in the game accurately reproduces historical features, enhancing the game's cultural depth and artistic value.

Not only in the gaming field, but 3D scanning systems, with their high precision, non-contact measurement, and digitization characteristics, can also contribute to the preservation and restoration of cultural relics. The fire at Notre-Dame Cathedral in 2019 attracted global attention. Prior to this, Notre-Dame Cathedral had already undergone comprehensive data recording using 3D scanning technology. This allows experts to use this data to carry out precise repair work after the fire. In addition, it can also be widely used in surveying and mapping engineering, industrial manufacturing, architectural design, education and scientific research and many other industries.

The 3D scanner, as the core component, is responsible for data acquisition and conversion. It consists of a probe, lens, and camera. The probe collects surface patterns without contact, the lens adjusts the probe position and viewing angle, and the camera converts captured images into digital signals for further processing like denoising, stitching, and optimization.

Hardware implementation faces several challenges:

Complex data processing: Limited by onsite conditions during data collection, processing can be complex, requiring extended post-processing like noise removal and mesh reconstruction, demanding high-performance hardware.

Compatibility issues: Incompatible hardware and software designs for point cloud data processing across different manufacturers hinder resource sharing and conversion, increasing learning and technical difficulties for users.

Environmental sensitivity: Lasers and optical systems are sensitive to temperature changes, requiring frequent calibration and affecting efficiency. External factors like temperature, humidity, and vibration can also impact measurement accuracy, necessitating strict environmental control.

High cost: The hardware cost of 3D scanners is often high, potentially leading to increased product prices and affecting market competitiveness.

Forlinx Embedded recommends using the FET3576-C embedded board as the main controller for 3D scanners. Based on the RK3576 processor, the FET3576-C is a high-performance, low-power, feature-rich, cost-effective solution tailored for AIoT and industrial markets. It integrates four ARM Cortex-A72 and four ARM Cortex-A53 high-performance cores, with a 6TOPS powerful NPU supporting various operations and deep learning frameworks.

（1）Versatile Interfaces

With GPIO, UART, SPI, and other communication interfaces, the FET3576-C precisely controls scanning parameters (e.g., scanning speed, resolution) and sensor states (e.g., laser emitter, camera shutter), enhancing scanning efficiency and quality

（2）Data Processing Hub

As the system's ''brain,'' the FET3576-C processes raw data like laser point clouds and images, ensuring accurate and complete 3D models through filtering, denoising, registration, and fusion.

（3）Intelligent Optimization

6TOPS NPU enables intelligent analysis of scanned data, automatically identifying and optimizing issues like flaws and holes in models, further enhancing their fineness and realism.

（4）Data Transmission and Storage

Supporting up to 4GB LPDDR4 RAM and 32GB eMMC storage, the FET3576-C securely and efficiently stores scan data locally. Additionally, it supports dual Gigabit Ethernet and Wi-Fi for real-time data transmission and remote access.

（5）Product Stability

With a board-to-board connection design, the FET3576-C facilitates easy installation and maintenance. It has undergone rigorous industrial environment testing, providing excellent stability, and a 10-15 year longevity ensures long-term supply reliability for customer products.

Forlinx Embedded FET3576-C embedded board plays a crucial role in 3D scanning systems. As the main controller, it leverages its powerful data processing capabilities and rich interface resources to enable end-to-end control from data acquisition to model output, providing a solid technical foundation for building high-precision and realistic 3D models.

More info:

[this-week-in-rust]

This Week in Rust 559

Hello and welcome to another issue of This Week in Rust! Rust is a programming language empowering everyone to build reliable and efficient software. This is a weekly summary of its progress and community. Want something mentioned? Tag us at @ThisWeekInRust on X (formerly Twitter) or @ThisWeekinRust on mastodon.social, or send us a pull request. Want to get involved? We love contributions.

This Week in Rust is openly developed on GitHub and archives can be viewed at this-week-in-rust.org. If you find any errors in this week's issue, please submit a PR.

Want TWIR in your inbox? Subscribe here.

Updates from Rust Community

Newsletters

thisweekinbevy - 0.14.1, tracking change detection, and more rendering examples

Project/Tooling Updates

Tauri 2.0 Release Candidate

CGlue 0.3 Future and Beyond

ratatui - v0.28.0

Pigg 0.3.3 the GUI for RPi GPIO interaction released, with Remote GPIO feature!

Announcing SeaORM 1.0

Danube - Queuing and Pub/Sub message patterns

Observations/Thoughts

Trying and mostly failing to optimize frustum culling in a WebGL + TS + Rust engine

Panic! At The Async Runtime Shutdown

Debugging a rustc segfault on illumos

Tracing my way with tracing-rs

[Series] The Hitchhiker’s Guide to Building a Distributed Filesystem in Rust.

Best Rust books for 2024

Phantom Menace: memory leak that wasn't there

Developing a cryptographically secure bootloader for RISC-V in Rust

Extending the #[diagnostic] tool attribute namespace

Rust Walkthroughs

Tracing Tokio Resources

[Series] Mastering Dependency Injection in Rust: Crafting a Custom Container

Research

The Hitchhiker’s Guide to Building a Distributed Filesystem in Rust.

Miscellaneous

Rustic: Enhanced Org Babel integration

Efficient Logging - Speeding up production code by logging more efficiently

Crate of the Week

This week's crate is WhenFS, a FUSE filesystem that misuses your google calendar as storage. And yes, your schedule will look as packed as mine once you store one or two files in there.

Despite yet another week fully devoid of suggestions nor votes, llogiq is reasonably pleased with his choice.

Please submit your suggestions and votes for next week!

Calls for Testing

An important step for RFC implementation is for people to experiment with the implementation and give feedback, especially before stabilization. The following RFCs would benefit from user testing before moving forward:

RFCs

No calls for testing were issued this week.

Rust

No calls for testing were issued this week.

Rustup

No calls for testing were issued this week.

If you are a feature implementer and would like your RFC to appear on the above list, add the new call-for-testing label to your RFC along with a comment providing testing instructions and/or guidance on which aspect(s) of the feature need testing.

Call for Participation; projects and speakers

CFP - Projects

Always wanted to contribute to open-source projects but did not know where to start? Every week we highlight some tasks from the Rust community for you to pick and get started!

Some of these tasks may also have mentors available, visit the task page for more information.

rencfs - Abstract file access layer

rencfs - Add RustCrypto as a feature

rencfs - File and fs API

rencfs - io API

rfs - Coordinator node API)

rfs - Data node API

rfs - File upload and changes

rfs - Communication between Coordinator and Data nodes

syncoxiders - Two-way sync

syncoxiders - Sync chunks in parallel

syncoxiders - Integrate SurrealDB to store metadata

syncoxiders - Migrate scripts tests to integration tests

rencfs-desktop - Implement daemon

Proposal: Deprecate Tokio's LocalSet

If you are a Rust project owner and are looking for contributors, please submit tasks here or through a PR to TWiR or by reaching out on X (Formerly twitter) or Mastodon!

CFP - Events

Are you a new or experienced speaker looking for a place to share something cool? This section highlights events that are being planned and are accepting submissions to join their event as a speaker.

No Calls for papers or presentations were submitted this week.

If you are an event organizer hoping to expand the reach of your event, please submit a link to the website through a PR to TWiR or by reaching out on X (formerly Twitter) or Mastodon!

Updates from the Rust Project

381 pull requests were merged in the last week

fix vita build of std and forbid unsafe in unsafe in the os/vita module

derive(SmartPointer): require pointee to be maybe sized

add #[must_use] to some into_raw* functions

add REDUNDANT_IMPORTS lint for new redundant import detection

add f16 and f128 math functions

allow overwriting the output of rustc --version

allow setting link-shared and static-libstdcpp with CI LLVM

android: remove libstd hacks for unsupported Android APIs

assert that all attributes are actually checked via CheckAttrVisitor and aren't accidentally usable on completely unrelated HIR nodes

better handle suggestions for the already present code and fix some suggestions

built-in derive: remove BYTE_SLICE_IN_PACKED_STRUCT_WITH_DERIVE hack and lint

cleanup sys module to match house style

create COFF archives for non-LLVM backends

custom MIR: add support for tail calls

delegation: second attempt to improve perf

delegation: support generics for delegation from free functions

detect non-lifetime binder params shadowing item params

do not fire unhandled attribute assertion on multi-segment AttributeType::Normal attributes with builtin attribute as first segment

don't re-elaborate already elaborated caller bounds in method probe

elaborate unknowable goals

emit an error if #[optimize] is applied to an incompatible item

enforce supertrait outlives obligations hold when confirming impl

fix removed box_syntax diagnostic if source isn't available

fix the invalid argument type

ignore use declaration reformatting in .git-blame-ignore-revs

implement UncheckedIterator directly for RepeatN

improve error message when global_asm! uses asm! operands

interpret: on a signed deref check, mention the right pointer in the error

make /// doc comments compatible with naked functions

mark Parser::eat/check methods as #[must_use]

match LLVM ABI in extern "C" functions for f128 on Windows

match lowering: Hide Candidate from outside the lowering algorithm

more unsafe attr verification

normalize when equating dyn tails in MIR borrowck

on short error format, append primary span label to message

peel off explicit (or implicit) deref before suggesting clone on move error in borrowck, remove some hacks

properly mark loop as diverging if it has no breaks

remove crate_level_only from ELIDED_LIFETIMES_IN_PATHS

revert recent changes to dead code analysis

set branch protection function attributes

simplify match based on the cast result of IntToInt

structured suggestion for extern crate foo when foo isn't resolved in import

temporarily switch ambiguous_negative_literals lint to allow

the output in stderr expects panic-unwind

turn invalid_type_param_default into a FutureReleaseErrorReportInDeps

tweak type inference for const operands in inline asm

use object in run-make/symbols-visibility

use a separate pattern type for rustc_pattern_analysis diagnostics

miri: add a flag to do recursive validity checking

miri: add miri_start support

miri: use Scalar consistently in foreign item emulation

linker: pass fewer search directories to the linker

use Vec in instantiate_binder_with_fresh_vars

change output normalization logic to be linear against size of output

check divergence value first before doing span operations in warn_if_unreachable

accelerate GVN a little

stabilize Wasm relaxed SIMD

stabilize unsafe extern blocks (RFC 3484)

enable std::io::copy specialisation for std::pipe::{PipeReader, PipeWriter}

rewrite binary search implementation

implement cursors for BTreeSet

implement the once_wait feature

configure which platforms have f16 and f128 enabled by default

hashbrown: implement Default for iterators

regex: rust nightly removed the lifetime from Pattern

cargo-miri: better error when we seem to run inside bootstrap but something is wrong

cargo: build-std: remove hack on creating virtual std workspace

cargo: config: Adjust MSRV resolve config field name / values

cargo: publish: Don't strip non-dev features

cargo: also build manpage for cargo.md

rustdoc-json: discard non-local inherent impls for primitives

rustdoc: cleanup CacheBuilder code for building search index

rustdoc: fix handling of Self type in search index and refactor its representation

rustdoc: make the hover trail for doc anchors a bit bigger

rustdoc: Make the buttons remain when code example is clicked

rustdoc: simplify body usage

rustfmt: add repo cloning to check-diff crate

rustfmt: check exit status of git commands spawned by build script

rustfmt: impl rewrite_result for Pat, TuplePatField

clippy: check exit status of subcommands spawned by rustc_tools_util

clippy: fix redundant_closure false positive with closures has return type contains 'static

clippy: fix redundant_slicing when the slice is behind a mutable reference

clippy: fix broken list for lints config

clippy: fix false positive for missing_backticks in footnote references

clippy: limit number of nonminimal_bool ops

clippy: lintcheck: force warn all lints

clippy: make restriction lints use span_lint_and_then (a → e)

clippy: make restriction lints use span_lint_and_then (q → w)

clippy: remove multispan_sugg[_with_applicability]

clippy: remove duplicated peel_middle_ty_refs

clippy: simplify lint deprecation

clippy: use a deterministic number of digits in rustc_tools_util commit hashes

clippy: use a single multipart suggestion for implicit_hasher

rust-analyzer: implement diagnostic for await outside of async

rust-analyzer: load sysroot library via cargo metadata

rust-analyzer: support inlay hint for more expr with label

rust-analyzer: apply IndexMut obligations for non-assigning mutable index usages

rust-analyzer: errors on method call inferences with elided lifetimes

rust-analyzer: insert a generic arg for impl Trait when lowering generic args

rust-analyzer: insert a tail Ok(()) for expr block instead of wrapping with Ok

rust-analyzer: panic in path transform with default type parameters

rust-analyzer: remove AbsPath requirement from linkedProjects

rust-analyzer: surpress type mismatches in calls with mismatched arg counts

rust-analyzer: improve crate manifests, adding missing [package.repository] and [package.description] fields

rust-analyzer: segregate syntax and semantic diagnostics

rust-analyzer: split out syntax-bridge into a separate crate

rust-analyzer: when josh-proxy screws up the roundtrip, say what the involved commits are

Rust Compiler Performance Triage

This week saw several large improvements caused mostly by the update to LLVM 19. There were some regressions in several pull requests, but most of them were immediately fixed in a follow-up PR.

Triage done by @kobzol. Revision range: 7e3a9718..8c7e0e16

Summary:

(instructions:u) mean range count Regressions ❌ (primary) 1.0% [0.2%, 3.8%] 91 Regressions ❌ (secondary) 1.9% [0.2%, 19.2%] 104 Improvements ✅ (primary) -4.4% [-15.8%, -0.3%] 120 Improvements ✅ (secondary) -3.3% [-10.4%, -0.2%] 70 All ❌✅ (primary) -2.1% [-15.8%, 3.8%] 211

6 Regressions, 3 Improvements, 5 Mixed; 4 of them in rollups 51 artifact comparisons made in total

Full report here

Approved RFCs

Changes to Rust follow the Rust RFC (request for comments) process. These are the RFCs that were approved for implementation this week:

Merge RFC 3529: Add named path bases to cargo

Merge RFC 3668: Async closures

Promote aarch64-apple-darwin to Tier 1

RFC for project goals

Final Comment Period

Every week, the team announces the 'final comment period' for RFCs and key PRs which are reaching a decision. Express your opinions now.

RFCs

No RFCs entered Final Comment Period this week.

Tracking Issues & PRs

Rust

[disposition: merge] Stabilize raw_ref_op (RFC 2582)

[disposition: merge] Tracking Issue for Ready::into_inner()

[disposition: merge] Tracking issue for thread::Builder::spawn_unchecked

[disposition: merge] Tracking Issue for is_none_or

[disposition: merge] CloneToUninit impls

[disposition: close] Tracking issue for HashMap OccupiedEntry::{replace_key, replace_entry}

[disposition: close] Tracking issue for HashMap::raw_entry

[disposition: merge] Implement DoubleEnded and ExactSize for Take\<Repeat> and Take\<RepeatWith>

[disposition: merge] Implement owned ops for HashSet and BTreeSet

[disposition: merge] Tracking Issue for Option::get_or_insert_default

[disposition: merge] Unify run button display with "copy code" button and with mdbook buttons

[disposition: merge] Greatly speed up doctests by compiling compatible doctests in one file

Cargo

No Cargo Tracking Issues or PRs entered Final Comment Period this week.

Language Team

No Language Team Tracking Issues or PRs entered Final Comment Period this week.

Language Reference

[disposition: \] Reformat (and only reformat) the inline assembly chapter

Unsafe Code Guidelines

No Unsafe Code Guideline Tracking Issues or PRs entered Final Comment Period this week.

New and Updated RFCs

[new] crates.io: Remove dev-dependencies from the index

Upcoming Events

Rusty Events between 2024-08-07 - 2024-09-04 🦀

Virtual

2024-08-07 | Virtual (Indianapolis, IN, US) | Indy Rust

Indy.rs - with Social Distancing

2024-08-08 | Virtual (Charlottesville, NC, US) | Charlottesville Rust Meetup

Crafting Interpreters in Rust Collaboratively

2024-08-08 | Virtual (Nürnberg, DE) | Rust Nuremberg

Rust Nürnberg online

2024-08-08 | Virtual (Tel Aviv, IL) | Code Mavens

Rust Source Code Reading: The thousands crate (English)

2024-08-13 | Virtual (Dallas, TX, US) | Dallas Rust

Second Tuesday: Typestate Pattern in Rust

2024-08-15 | Virtual (Berlin, DE) | OpenTechSchool Berlin + Rust Berlin

Rust Hack and Learn | Mirror: Rust Hack n Learn Meetup

2024-08-20 | Virtual (Washington, DC, US) | Rust DC

Mid-month Rustful

2024-08-21 | Hybrid - Virtual and In-Person (Vancouver, BC, CA) | Vancouver Rust

Rust Study/Hack/Hang-out

2024-08-22 | Virtual | Conf42: Online Tech Events

Conf42 Rustlang 2024

2024-08-22 | Virtual (Charlottesville, NC, US) | Charlottesville Rust Meetup

Crafting Interpreters in Rust Collaboratively

2024-08-22 | Virtual (Karlsruhe, DE) | Karlsruhe Functional Programmers Group

Stammtisch (gemeinsam mit der C++ UG KA): various topics, from C++ to Rust

2024-08-27 | Virtual | Ardan Labs

Fearless Concurrency with Rust

2024-08-27 | Virtual (Bordeaux, FR) | Rust Bordeaux

Live coding - A distance #1

2024-08-27 | Virtual (Dallas, TX, US) | Dallas Rust

Last Tuesday

2024-08-27 | Virtual (Tel Aviv, IL) | Code Mavens

Declarative macros in Rust (Virtual) - מקרוים בראסט

2024-08-28 | Virtual (Tel Aviv, IL) | Code Mavens

Command Line Tools: Implementing wc in Rust (English, Virtual)

2024-08-29 | Virtual (Berlin, DE) | OpenTechSchool Berlin + Rust Berlin

Rust Hack and Learn | Mirror: Rust Hack n Learn Meetup

2024-09-03 | Virtual (Buffalo, NY, US) | Buffalo Rust Meetup

Buffalo Rust User Group

2024-09-04 | Virtual (Indianapolis, IN, US) | Indy Rust

Indy.rs - with Social Distancing

Europe

2024-08-14 | Köln/Cologne, DE | Rust Cologne

This Month in Rust, August

2024-08-14 | Reading, UK | Reading Rust Workshop

Reading Rust Meetup

2024-08-20 | Aarhus, DK | Rust Aarhus

Hack Night

2024-08-21 | Nürnberg, DE | Rust Nuremberg

Walk'n'Talk around Wöhrder See (+ Burritos)

2024-08-22 | Manchester, UK | Rust Manchester

Rust Manchester Talks August

2024-08-26 | Mainz, DE | Fachschaft Mathematik+Informatik der JGU Mainz

Ferienkurs Rust

2024-08-29 | Berlin, DE | OpenTechSchool Berlin + Rust Berlin

Rust and Tell - Title

North America

2024-08-08 | Mountain View, CA, US | Mountain View Rust Meetup

Rust Meetup at Hacker Dojo

2024-08-08 | Seattle, WA, US | Seattle Rust User Group

August Meetup

2024-08-19 | Minneapolis, MN US | Minneapolis Rust Meetup

Minneapolis Rust Meetup: "State of Rust GPU Programming" & Happy Hour

2024-08-20 | New York, NY, US | Rust NYC

Rust NYC: Doing the Bare Minimum with Isograph (talk)

2024-08-20 | San Francisco, CA, US | San Francisco Rust Study Group

Rust Hacking in Person

2024-08-21 | Virtual and In-Person (Vancouver, BC, CA) | Vancouver Rust

Rust Study/Hack/Hang-out

2024-08-28 | Austin, TX, US | Rust ATC

Rust Lunch - Fareground

2024-08-29 | Nashville, TN, US | Music City Rust Developers

Music City Rust Developers : placeholder

Oceania

2024-08-22 | Auckland, NZ | Rust AKL

Rust AKL: Dot IX: Diagram Generator + Deep Learning from Scratch in Rust

2024-08-27 | Canberra, ACT, AU | Canberra Rust User Group (CRUG)

June Meetup

If you are running a Rust event please add it to the calendar to get it mentioned here. Please remember to add a link to the event too. Email the Rust Community Team for access.

Jobs

Please see the latest Who's Hiring thread on r/rust

Quote of the Week

Want to have a crate with a million features? Host your own registry and revel in the combinatorial explosion of choices!

– Jake Goulding on rust-users

Thanks to Jonas Fassbender for the suggestion!

Please submit quotes and vote for next week!

This Week in Rust is edited by: nellshamrell, llogiq, cdmistman, ericseppanen, extrawurst, andrewpollack, U007D, kolharsam, joelmarcey, mariannegoldin, bennyvasquez.

Email list hosting is sponsored by The Rust Foundation

Discuss on r/rust

[g-nicerf]

The several noteworthy features of LoRa-STM32WLE5 SOC module

SoC is short for System on Chip, which is an integrated chip that integrates all or most of the components of a computer or other electronic system. These components typically include a central processing unit (CPU), memory, input/output interfaces, and auxiliary storage interfaces.It integrates digital, analog, mixed-signal, and typically RF signal processing functionalities, depending on the application. The main difference between System-on-Chip (SoC) modules and LoRa modules lies in their functionalities and application scopes. SoC modules are highly integrated chips capable of executing complex computing and processing tasks, suitable for a wide range of embedded and consumer electronics applications. LoRa modules are specialized in low-power, long-distance wireless communication, primarily used in IoT applications such as remote monitoring and sensor networks. In summary, SoC module serves as a versatile computing platform, whereas a LoRa module focuses on wireless communication functionalities.

System-on-chip SOC applications

Since the SOC module is integrated on a single substrate, SoC modules consume significantly less power compared to equivalent multi-chip designs and occupy much smaller area. They can perform various functions, including signal processing, wireless communication, and artificial intelligence. SoCs are commonly used in embedded systems and IoT. with the rise of smart homes and connected devices, SoC technology has become essential in enabling these devices to communicate seamlessly. SoC technology enables these devices to process data quickly and accurately, making them more responsive and reliable.

Compared to SoC modules, LoRa communication modules require separate configuration of DPS or MCU for digital signal processing and storage, which increases their volume compared to SoC modules. However, LoRa modules benefit from unique LoRa modulation, offering advantages such as low power consumption and long-range transmission capabilities. These features make LoRa modules well-suited for sensor networks and remote data transmission applications.

Can SoC module also adopt LoRa modulation?

NiceRF Newly Launched LoRa-STM32WLE5 module ,whhich utilizes the STM32WLE5 chip from STMicroelectronics and integrates LoRa, (G)FSK, (G)MSK and BPSK modulation. The SOC module is equipped with a high-performance Arm Cortex-M4 32-bit RISC core, with an operating frequency of up to 48 MHz, and supports 256KB flash memory and 64KB RAM. At the same time, the module has a built-in industrial-grade crystal oscillator, which enables it to maintain a stable operating state in various working environments.

The earlier discussion mentioned that for LoRa communication modules to handle digital signal processing and data storage, a separate DSP or MCU is required, which increases module size. However, in the SOC module like the LoRa-STM32WLE5, the Arm Cortex-M4 32-bit core integrates a complete set of DSP instructions and an independent Memory Protection Unit (MPU). This integration enhances application security and significantly reduces module size.

The Features of STM32WLE Chip

The STM32WL5 micro-controller is based on Arm® Cortex®-M4 and Cortex®-M0+ cores running at a frequency of 48 MHz, along with Semtech's SX126x sub-GHz wireless technology. It supports an open platform with LoRa®, (G)FSK, (G)MSK, and BPSK modulations.

The STM32WL5 series adopts the development technologies similar to the ultra-low-power STM32L4 micro-controllers, offering comparable digital and analog peripherals. It is suitable for the wide range of simple or complex applications that require extended battery life and longer RF range using sub-GHz transceivers.

The STM32WL5 microcontroller complies with the physical layer requirements of the LoRaWAN® specification, which is published by the LoRa Alliance®.

The STM32WL5 series incorporates multiple communication features, including up to 43 GPIOs, integrated SMPS for optimized power consumption, and various low-power modes to maximize battery life. Dual power outputs and a wide linear frequency range ensure compatibility worldwide.

Overview of STM32WL5 Chip Features

Operating Environment: -40°C ~105°C

Frequency range150 -960 MHz

256KB Flash Memory, 64KB SRAM

True Random Number Generator (RNG), Hardware Encryption AES 256-bit

Sector Protection against Read/Write Operations (PCROP), Hardware Public Key Accelerator (KPA)

Efficient Embedded SMPS Buck Converter

SMPS to LDO Smart Switch

Low-Power BOR Power-On Reset

Ultra-Low-Power POR/PDR

Programmable Voltage Detector

For details, please click：https://www.nicerf.com/products/ Or click：https://nicerf.en.alibaba.com/productlist.html?spm=a2700.shop_index.88.4.1fec2b006JKUsd For consultation, please contact NiceRF (Email: sales@nicerf.com).

[myprogrammingsolver]

Lab 3: DAC, Timers, Interupts, DMA and Analog Interfacing

This exercise will extend the use of GPIOs and will employ the DAC and the buzzer (speaker) to generate observable audio outputs. You will also practice the use of a timer (TIM), interrupts and finally the DMA. The lab will be done in two parts, with the second part building on the success of the first one. This exercise relies on the previous laboratory exercises, the classes and tutorials, and…

[lanshengic]

NXP and Xiaomi Vela jointly build an IoT ecosystem to provide a powerful technology engine for the IoT development community

【Lansheng Technology News】Recently, at the 2023 Xiaomi IoT Ecological Partner Conference, NXP Semiconductors was invited to attend as an important partner of Xiaomi and demonstrated the powerful technical resource support provided to the Xiaomi Vela ecological community.

Xiaomi Vela is an embedded IoT software platform built on the open source real-time operating system NuttX and customized for consumer-grade IoT. It can provide a unified software platform on various IoT hardware, shielding the differences in underlying hardware. Through rich components and standardized software frameworks, it provides a unified software interface for upper-level device developers to open up fragmented things. Networked application scenarios greatly reduce the complexity of development and improve development efficiency.

As a global ecological partner of Xiaomi Vela, NXP is deeply involved in the construction of the ecosystem of this development community and has launched a series of technical resources. At this event, NXP highlighted the i.MX RT1060 EVK development kit.

NXP's i.MX RT1060 cross-border MCU is based on the 600MHz Arm Cortex-M7 core and has 1MB on-chip SRAM. It has strong real-time performance and high integration, and is suitable for various industrial and IoT applications. The i.MX RT1060 series provides 2D graphics, camera and various memory interfaces, as well as a wide range of connection interfaces, including UART, SPI, I2C, USB, 2 10/100M Ethernet interfaces and 3 CAN interfaces. Its other features for real-time applications include: high-speed GPIO, CAN-FD, and synchronous parallel NAND/NOR/PSRAM controller.

In addition, i.MX RT1060 has a 2D hardware graphics acceleration PXP module, 3 I2S interfaces for high-performance multi-channel audio, and supports LCD display controller (up to WXGA 1366 x 768). The i.MX RT1060 is available in 225BGA and 196BGA packages, providing greater flexibility with an extended temperature range of -40°C to 125°C.

The i.MX RT1060 series can be developed using NXP's official MCUXpresso tool chain, including SDK, IDE options, and security configuration and configuration tools, enabling rapid development and supporting various real-time operating systems (RTOS) such as FreeRTOS, Xiaomi Vela, Nuttx, Zephyr, etc. .

Xiaomi Vela is fully scalable from micro (8-bit) to mid-range embedded (64-bit) systems with a high degree of standards compliance, easy to port, fully open, highly real-time and powerful. i.MX RT1060 fully supports Xiaomi Vela. Currently supported drivers include ADC, CAN, eLCDIF, ENC, ENET, GPIO, I2S, PWM, SPI, UART and USB. It also supports Vela’s LVGL Demo and can be adapted to Xiaomi The upper component of Vela framework. This combination of soft and hard will provide a powerful technical engine for the development of the Xiaomi Vela ecological community.

Lansheng Technology Limited, which is a spot stock distributor of many well-known brands, we have price advantage of the first-hand spot channel, and have technical supports.

Our main brands: STMicroelectronics, Toshiba, Microchip, Vishay, Marvell, ON Semiconductor, AOS, DIODES, Murata, Samsung, Hyundai/Hynix, Xilinx, Micron, Infinone, Texas Instruments, ADI, Maxim Integrated, NXP, etc

To learn more about our products, services, and capabilities, please visit our website at http://www.lanshengic.com

[woodworking-diy]

PCF8574 GPIO Extender - With Arduino and NodeMCU

In my last tutorial, I talked about the TCA9548A MUX which can be used to add at the max of 64 I2C or I²C sensors to your Arduino/ESP8266/ESP32.In this tutorial, I am going to talk about the PCF8574 8-bit GPIO Port Extender. It is one of the many GPIO extenders available in the market.This tiny little board becomes a life saver When you run out of pins on your Arduino. This "GPIO (General Purpose Input Output) pin extender" provides an additional 8 pins (P0 ~ P7) which can be used to 'output a signal' or 'read a signal as an input'.These modules run on the I2C bus, and if daisy-chained you can connect upto 8 of these devices in a project. Each device will give us an additional 8-bits of GPIO enabling 64 GPIOs in total.These ICs are ridiculously cheap and can be bought easily from eBay or AliExpress. If you don't want to worry about the wiring and just want to keep your project really "simple", then you can buy these fully assembled breakout boards. You just need to hook them up to the I2C bus and you are all ready to go.

Blog Post: https://diyfactory007.blogspot.com/2018/12/pcf8574-gpio-extender-with-arduino-and.html

[aneddoticamagazinestuff]

Flipper Zero: Tamagochi for Hackers

New Post has been published on https://www.aneddoticamagazine.com/flipper-zero-tamagochi-for-hackers/

Flipper Zero: Tamagochi for Hackers

Flipper Zero is a portable multi-tool for pentesters and geeks in a Tamagotchi-like body. It loves hacking digital stuff, such as radio protocols, access control systems, hardware and more. It’s fully open-source and customizable, so you can extend it in whatever way you like.

Flipper Zero is a tiny piece of hardware with a curious personality of a cyber-dolphin who really loves to hack. It can interact with digital systems in real life and grow while you are hacking. Flip any kind of access control system, RFID, radio protocol and perform hardware hacks using GPIO pins.

The idea of Flipper Zero is to combine all the phreaking hardware tools you’d need for hacking on the go. Flipper was inspired by pwnagotchi project, but unlike other DIY boards for hackers, Flipper is designed with the convenience of everyday usage in mind — it has a robust case, handy buttons and shape, so there are no dirty PCBs or scratchy pins. Flipper turns hacking into a game, reminding you that hacking should always be fun.

https://flipperzero.one/

[pragya0123]

Choosing the Perfect Raspberry Pi Enclosure: Factors and Recommendations

Want the best Raspberry Pi case? Check out our detailed guide, including factors to consider, top recommendations, and step-by-step assembly instructions.

Introduction to Raspberry Pi Cases

The Raspberry Pi, a credit-card-sized computer, has gained immense popularity among tech enthusiasts and DIY hobbyists. However, to ensure its longevity and protect it from potential damage, it is crucial to invest in a suitable case. In this blog post, we will explore the importance of Raspberry Pi cases and delve into the various types available in the market.

2. Factors to Consider When Choosing a Raspberry Pi Case

When selecting a Raspberry Pi case, several factors should be taken into account to ensure the best fit for your needs. These factors include the size and compatibility of the case, cooling and ventilation options, accessibility to ports and GPIO pins, and the ability to customize the case to your preferences.

Size and compatibility:

Consider the specific model of your Raspberry Pi and ensure that the case is designed to accommodate it.

Check the dimensions and ensure that the case provides a snug fit to avoid any movement or potential damage.

Cooling and ventilation options:

Look for cases that offer effective cooling mechanisms such as fans, heatsinks, or ventilation holes.

Proper cooling helps maintain optimal operating temperatures and extends the lifespan of your Raspberry Pi.

3. Access to ports and GPIO pins:

Ensure that the case allows easy access to all the necessary ports, including HDMI, USB, Ethernet, and audio.

If you plan to use the GPIO pins, ensure that the case provides convenient access to them without obstruction.

4. Aesthetics and customization:

Consider your personal preferences and the environment in which your Raspberry Pi will be placed.

Look for cases that offer customization options such as interchangeable covers or the ability to add LED lights.

3. Top Raspberry Pi Case Recommendations

Based on various factors like quality, features, and customer reviews, we have compiled a list of top Raspberry Pi cases that cater to different needs and budgets.

Best overall case: [Expand on the recommended case and its features.]

Best budget case: [Expand on the recommended affordable case and its features.]

Best case for specific needs: [Expand on the recommended case suitable for gaming, cooling, or other specific requirements.]

[bitstream24]

ESP32 with Dual Isolated CAN Port Controls Thomson Electrac Linear Actuator

The espBerry DevBoard combines the ESP32-DevKitC development board with any Raspberry Pi HAT by connecting to the onboard RPi-compatible 40-pin GPIO header. For the two isolated CAN ports, I chose the Dual Isolated CAN Bus HAT for Raspberry Pi. I extended the original espBerry baseboard, adding some digital and analog IO plus a serial connection for an external display.