#NAND gate

[magnificent-mechanism99]

Why does digital elecronics is important for engineering?

Digital electronics is super important in engineering for a bunch of reasons—it's pretty much the backbone of modern technology. Digital electronics powers everything from smartphones and computers to cars and medical devices. Engineers across disciplines need to understand it to design, troubleshoot, or innovate with modern systems.

GET CIRCUIT DESIGNING VIDEO TUTORIAL 👈.

Digital tech allows for very large-scale integration (VLSI), meaning engineers can cram millions of logic gates into a single chip (like microprocessors or memory). It enables powerful, compact, and cost-effective designs.

[jhnn2varra]

https://www.futureelectronics.com/p/semiconductors--memory--storage--embedded-storage/emmc04g-m627-e02u-kingston-8130398

eMMC storage drives, emmc storage upgrade, eMMC multimedia cards

4GB eMMC v5.1 3.3V 153-ball BGA Operating Temp - 25C to +85C

[mrvaxxl]

Logic Gates (NOT, Buffer, AND, OR, NAND, NOR, XOR, XNOR) and Their Truth Tables

Logic gates are the cornerstone of digital electronics, serving as the fundamental building blocks for a vast array of electronic devices and computing systems.

Each gate, characterized by a unique symbol, performs a specific logical function, dictating how binary inputs are processed to produce a binary output.

Understanding the symbols and truth tables of various logic gates, such as AND, OR, NOT, NAND, NOR, XOR, and XNOR, is crucial for anyone diving into the realms of circuit design and digital computation.

Read more:

[tropicalcontinental]

So real 💥💥💥

Andrew mentioning the fact thay Chris had a creeper birthday suit skin + mentioning he had a cringe gamer boy MC skin way back when + the aforementioned tags has culminated into this, they sillys

[tgemorbingpaper]

imagigne two freaks. im talking two twisted fucking cycle paths,. twoof the worst guys youll ever encounter. now imagine that they r both autistic. and in love;. and t4t also

[rdigo2all]

https://www.futureelectronics.com/p/semiconductors--logic--74-series--a-hc-t/74hc594d-118-nexperia-7037351

Nand gate IC, and gate IC, 74 A/HC/T Series Logic Chips, logic  circuits,

74HC Series 6 V 8-Bit Shift Register with Output Register - SOIC-16

[i-iii-iii-vii]

⁽˙³˙⁾( ͠° ͟ʖ ͡°)💻

(*ᐛ)っ(  ͠° ͟ʖ ͡°)💻

[hnry2kkrr]

https://www.futureelectronics.com/p/semiconductors--memory--storage--embedded-storage/emmc04g-w627-x03u-kingston-1111540

What is eMMC storage, eMMC memory, solid-state hard drives

EMMC04G-MT32-01G10

[commodorez]

Thy Graphics

A graphics card for the Cactus directly patterned after the OSI-440, with a few modernizations and optimizations.

I've replaced the eight 2102 SRAM chips with a pair of 2114s. I've also swapped the 2513 character generator ROM with a 2816 EEPROM which gives me not only lower case letters, but pseudo-graphical characters not unlike PETSCII. I've re-implemented the address select logic using modern parts (thank you 74688), and swapped the open-collector NAND gate based video/sync combiner circuit with one I copied from a PET video combiner circuit using 4066 analog switches. I didn't like how vague the delay taps were described, so I added in some jumpers to let the user pick their delay timing.

And hooo boy this had some motherfucking BUGS in it.

Vertical sync polarity was backwards.

Video pixel data was inverted too.

In fact, so were the DIP switches for the address select.

I also got half of the 74123 resistor/capacitor inputs backwards due to not paying attention to the idiosyncrasies of the symbols in my old version of KiCAD.

Oh, and the character ROM I stole from my OSI-540B replica has inverted bit order, so the characters looked backwards.

Every single problem I had was due to something being backwards.

Nothing a little debugging can't fix. Took about 7 hours of tired stumbling with help from friends in the retrotech crew to figure out all the little faults and work around them, but in the end...

It works! It fucking works! The Cactus has video! I made a fucking video card from scratch! I didn't use any dedicated video chipsets or FPGAs or microcontrollers or CRTCs or any of that shit. I didn't make VGA, I made composite video.

All 24x24 usable characters on screen in monochrome goodness from this tiny little PCB. Now onto the Rev B design!

[cloudy-caspirations]

Tuesday • February 4, 2025

Pictured here we have a responsible electrical engineering student double-checking her circuit’s functionality before her digital logic lab using simulation software rather than going in blind and praying that it works correctly. Not pictured however is that same circuit approximately 4-5 hours later in said lab, smoke visibly coming from the breadboard and a pile of burnt components laying abandoned on the workbench as my lab partner frantically apologizes for turning the input voltage up to 7V.

Yeah, Friday’s lab got a little hectic to say the least. It was fun though! I spent a long time prepping for the lab and even pre-built the circuit (XOR function made of 4 NAND gates) because I’m not as confident with digital logic as I was with circuit analysis, and I had no clue how to wire up logic gates. I’m glad I did all of that prep though because when disaster struck, I was ready. There wasn’t even anything wrong with the circuit itself, my design worked fine and both the XOR and NAND-equivalent portions were functional, but my breadboard was too stiff for my cheap jumper wires and my lab partner turned up the voltage when the LED’s flickered instead of adjusting the wires. Meanwhile, I left the bench to grab the lab professor to re-check my circuit, and I came back to $45+ worth of my own equipment completely burnt 🥲.

I was a little ticked off at my lab partner, especially because every EE student has to buy their own materials for labs short of power supplies and oscilloscopes and everything is expensive when you’re a broke college student, but it was an honest mistake (partially due to my own faulty wires at that) and I can just use his supplies for now while I’m working on replacing my own. I just hope we don’t have a repeat this Friday and break his equipment too, then we would just be screwed 😭.

[arch-official]

I'm working on a little project (I'll say more later I just want to get a little further on before I give anyone's hopes up <- She says as if she didn't sign up for a circuit design class specifically for this project and has spent months planning) but I've been spending ALL DAY designing a custom 8-bit counter that can handle io/jumps (say the counter is at 4 and I send an interrupt signal for it to jump to 24) ONLY TO FIND AN IC THAT ALREADY DOES THAT!!

Fuckk youuuuuu SN54LS593!!!! But also like, thank you so much for saving me from buying like 100000000 NAND gate ICs

[communalnullity]

her NAND gate pussy got me functionally complete

[vbsemi-mosfet]

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🚗 Automotive-Grade MOS Survival Thresholds: From AEC-Q101 to 800V Platforms 🚗 EV intelligence demands high-voltage/high-frequency solutions. Infineon’s OptiMOS™ 7 cuts RDS(on) by 25% and boosts switching speed by 20% using copper-clip packaging and 12-inch thin-wafer tech. BYD’s 2025 sourcing prioritizes diodes/transistors for power modules, while SemiDrive’s ASIL-D certified MCUs and GigaDevice’s GD32A503 secure major shares. VBsemi’s automotive MOS family, AEC-Q101 Grade 0 certified, features a tri-clad copper bonding structure reducing thermal resistance by 40%. Validated in XPENG’s brake-by-wire systems, it delivers millisecond response at -40°C with <10 PPM failure rates – setting new benchmarks for domestic reliability.

🌐 AI Compute Arms Race: DrMOS & Advanced Packaging Dual Fronts 🌐 NVIDIA’s GB300 NVL72 systems will drive 2025 DrMOS demand beyond 150M units, with AOS (70% share) as key supplier. NVIDIA’s cost-optimized 5x5mm DrMOS increases per-rack usage by 30% while halving unit prices, lifting server efficiency by 35%. TSMC’s CoWoS expansion and Chinese OSATs’ FOPLP/Chiplet projects push inter-chip bandwidth past 900GB/s. VBsemi’s next-gen DrMOS with Intelligent Phase Extension delivers 180A phase current in 5x5mm packages, accelerating dynamic response by 50%. Currently validating with Inspur, it boosts NVIDIA H100 GPU power efficiency by 0.8%, saving >$2,800/year per rack in electricity.

🌱 Circular Economy Reshapes Supply Chains: Recycling Boom to Lead-Free Wave 🌱 E-waste recycling surges in Shenzhen/Dongguan, with ICs fetching up to $23/PCS. EU’s 2026 lead-free mandate spurs demand for eco-components. VBsemi’s GreenMOS™ platform pioneers tin-whisker-resistant alloys and lead-free pre-plating, achieving 98% recyclability. Their super-junction MOS series passes IEC 61215 salt-mist certification, reducing coastal solar farm failures by 70%. BYD/CATL’s closed-loop systems target 85% material reuse by 2025.

🔋 Material Revolution: Silicon to Quantum Tunneling Breakthroughs 🔋 Third-gen semiconductors advance in parallel: TYSiC’s 8-inch SiC wavers hit 85% yield with 1.6% resistivity uniformity; Origin Quantum’s 72-qubit "Wukong" chip and IBM’s 1000-qubit processor mark quantum leaps. VBsemi’s hybrid gate-oxide tech (co-developed with CAS) slashes GaN HEMT gate leakage by 1,000x, enabling 97.2% efficiency at 2400V. Deployed in Huawei’s chargers, it achieves record 6.8W/cm³ power density.

💡 The Next Decade: From "China Replacement" to "Global Redefinition" 💡 Per BCG, 2025 global semiconductor market rebounds to $650B (AI chips +35%, consumer electronics +3%). China reconfigures supply chains via "wafer-fab origin" rules: SMIC’s 28nm capacity grows 5x in 3 years with 52% domestic equipment; JCET’s advanced packaging runs at >85% utilization. As Cambricon’s computing-in-memory chips rival global leaders and YMTC’s 128L NAND forces Samsung to cut prices by 15%, a multipolar tech era accelerates – with VBsemi’s innovations at its core.

👉 Follow #MOSElectronics #ChipRevolution #TechSovereignty for industry pulse!

[moose-mousse]

What is half-adder and full-adder combinational circuits?

So this question came up in the codeblr discord server, and I thought I would share my answer here too :3

First, a combinational circuit simply means a circuit where the outputs only depends on its input. ( combinational means "Combine" as in, combining the inputs to give some output )

It is a bit like a pure function. It is opposed to circuits like latches which remembers 1 bit. Their output depends on their inputs AND their state.

These circuits can be shown via their logic gates, or truth tables. I will explain using only words and the circuits, but you can look up the truth tablet for each of the circuits I talk about to help understand.

Ok, so an in the case of electronics is a circuit made with logic gates ( I... assume you know what they are... Otherwise ask and I can explain them too ) that adds 2 binary numbers, each which have only 1 character. 

So one number is 1 or 0

And the other number is 1 or 0

So the possible outputs are are 0, 1 and 2.

Since you can only express from 0 to 1 with one binary number, and 0 to 3 with 2, we need to output 2 binary numbers to give the answer. So the output is 2 binary numbers

00 = 0

01 = 1

10 = 2

11 = 3 // This can never happen with a half adder. The max possible result is 2

Each character will be represented with a wire, and a wire is a 0 if it is low voltage (usually ground, or 0 volts) and a 1 if it is high voltage (Voltage depends. Can be 5 volts, 3.3, 12  or something else. )

BUT if you only use half adders, you can ONLY add 2 single character binary numbers together. Never more.

If you want to add more together, you need a full adder. This takes 3 single character binary numbers, and adds them and outputs a single 2 character number.

This means it have 3 inputs and 2 outputs.

We have 2 outputs because we need to give a result that is 0, 1, 2 or 3

Same binary as before, except now we CAN get a 11 (which is 3)

And we can chain full adders together to count as many inputs as we want.

So why ever use a half adder? Well, every logic gate cirquit can be made of NAND (Not and) gates, so we usually compare complexity in how many NAND gates it would take to make a circuit. More NAND gates needed means the circuit is slower and more expensive to make.

A half adder takes 5 NAND gates to make

A full adder takes 9 NAND gates.

So only use a full adder if you need one.

Geeks for Geeks have a page for each of the most normal basic cirquits:

I hope that made sense, and was useful :3

[fipindustries]

I am a little dissapointed that turing complete doesnt make you build the original nand logic gate out of transistors through.

[kraniumet]

is this like. a nand gate situation