#Architecture of 8085 Microprocessor

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Comprehensive AKTU B.Tech IT Syllabus for All Years

The AKTU B.Tech 1st year syllabus lays the foundational framework for engineering students, covering essential concepts across core subjects, practical labs, and professional skills. The first year is divided into two semesters, focusing on mathematics, science fundamentals, engineering basics, and programming skills, vital for higher technical studies.

First Year B.Tech IT Syllabus

Semester 1

Core Subjects

Mathematics-I Introduces calculus, linear algebra, and differential equations for engineering problem-solving and applications.

Physics-I Covers mechanics, wave motion, and thermodynamics, tailored for engineering contexts.

Introduction to Programming (C Language) Focuses on programming fundamentals, data structures, algorithms, and hands-on coding practice.

Electrical Engineering Basics Provides a foundation in circuit theory, electrical machines, and power systems.

Professional Communication Enhances communication, writing, and presentation skills essential for professional growth.

Practical Labs

Physics Lab

Electrical Engineering Lab

Programming Lab (C Language)

Semester 2

Core Subjects

Mathematics-II Delves into advanced calculus, vector calculus, and linear transformations.

Chemistry Covers physical, inorganic, and organic chemistry, with emphasis on engineering materials.

Engineering Mechanics Introduces statics, dynamics, and mechanics of rigid bodies.

Computer System & Programming Explores computer architecture, assembly language, and structured programming.

Basic Electronics Engineering Focuses on electronic devices, circuits, and fundamental applications.

Practical Labs

Chemistry Lab

Basic Electronics Lab

Computer Programming Lab

Second Year B.Tech IT Syllabus

Semester 3

Core Subjects

Data Structures Using C Covers arrays, stacks, queues, linked lists, and trees for efficient data manipulation.

Discrete Mathematics Explores set theory, combinatorics, graph theory, and logic, forming a mathematical backbone for computing.

Digital Logic Design Introduces binary arithmetic, logic gates, combinational and sequential circuits.

Database Management Systems (DBMS) Focuses on relational databases, SQL, and the fundamentals of database design.

Computer Organization and Architecture Delves into CPU structure, memory hierarchy, and I/O systems.

Practical Labs

Data Structures Lab

Digital Logic Design Lab

DBMS Lab

Semester 4

Core Subjects

Operating Systems Covers process scheduling, memory management, file systems, and more.

Software Engineering Introduces software development life cycle, methodologies, and quality management practices.

Object-Oriented Programming (OOP) Using Java Covers OOP principles using Java, focusing on classes, inheritance, and polymorphism.

Theory of Automata & Formal Languages Studies automata theory, regular expressions, and context-free grammars.

Design and Analysis of Algorithms Focuses on algorithmic strategies, complexity analysis, and optimization techniques.

Practical Labs

Operating Systems Lab

Java Programming Lab

Algorithms Lab

Third Year B.Tech IT Syllabus

Semester 5

Core Subjects

Computer Networks Covers networking layers, TCP/IP, routing algorithms, and data communication.

Compiler Design Explores lexical analysis, syntax analysis, semantic analysis, and optimization techniques.

Web Technologies Introduces front-end and back-end web development using HTML, CSS, JavaScript, and server-side scripting.

Microprocessors and Interfacing Covers 8085/8086 microprocessors, interfacing, and assembly language programming.

Elective I Allows students to specialize in a subject area based on their interest.

Practical Labs

Computer Networks Lab

Microprocessor Lab

Web Technologies Lab

Semester 6

Core Subjects

Artificial Intelligence Covers foundational AI techniques, knowledge representation, and learning algorithms.

Distributed Systems Focuses on distributed computing models, coordination, and replication.

Mobile Computing Emphasizes mobile app development, wireless communication, and mobility management.

Advanced Database Systems Covers NoSQL databases, data warehousing, and database security measures.

Elective II Provides an additional specialization option.

Practical Labs

AI Lab

Mobile Application Lab

Distributed Systems Lab

Final Year B.Tech IT Syllabus

Semester 7

Core Subjects

Machine Learning Focuses on supervised, unsupervised learning algorithms, and evaluation models.

Cloud Computing Introduces cloud service models, deployment, and cloud security.

Information Security Covers cryptographic methods, network security, and security threats.

Elective III Tailored to specific industry-oriented needs and interests.

Practical Labs

Machine Learning Lab

Cloud Computing Lab

Major Project Phase I

Semester 8

Core Subjects

Big Data Analytics Explores data mining, the Hadoop ecosystem, and advanced analytics.

Entrepreneurship Development Prepares students with business planning, innovation, and management skills.

Major Project The culmination of academic knowledge in a comprehensive project.

This structured curriculum equips students with in-depth IT skills and knowledge, preparing them for a thriving career in technology and innovation.

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Intel 8085 Architecture: A Comprehensive Guide

In the ever-evolving tapestry of computing, the Intel 8085 microprocessor stands as a landmark achievement, a pivotal piece that laid the foundation for the modern microprocessors that power our lives. Understanding the Intel 8085 architecture reveals how this seemingly simple 8-bit processor, introduced by Intel in 1976, not only revolutionized computing but also ushered in a new era of…

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Intel 8086: A 16-bit Microprocessor

#NeedToKnow: intel8086

The intel 8086 is a 16-bit microprocessor introduced by intel in 1978. It marked a significant advancements over the earlier 8-bit processor like the 8085. key features and aspects of intel 8086 01. 16-Bit Architecture: The 8086 is a 16- bit processor with a 16-bit data bus and a 20-bit address bus, allowing it to address up to 1MB of memory. 02. Register: It includes a set of 16-bit…

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Microprocessors and Microcontrollers: Key Components of ESE Electronics Syllabus

In the Electronics and Communication Engineering (ECE) syllabus for the Engineering Services Examination (ESE) in India, microprocessors and microcontrollers are important topics that are covered. These topics are fundamental to understanding digital electronics and embedded systems. Here are some key components related to microprocessors and microcontrollers in the ese electronics syllabus:

Introduction to Microprocessors and Microcontrollers:

Overview of microprocessors and microcontrollers.

Basic architecture and functionalities of microprocessors and microcontrollers.

Microprocessor Architecture:

Explanation of the architecture of popular microprocessors, such as Intel 8085, 8086, or similar architectures.

Detailed study of various components, including registers, ALU (Arithmetic Logic Unit), control unit, memory, and buses.

Microcontroller Architecture:

Understanding the architecture of microcontrollers like the 8051 microcontroller.

Key components like CPU, RAM, ROM, I/O ports, timers/counters, and interrupt system.

Assembly Language Programming:

Writing assembly language programs for microprocessors and microcontrollers.

Understanding instruction sets, addressing modes, and programming concepts.

Memory Interface:

Study of memory interfacing techniques for microprocessors and microcontrollers.

Concepts like memory organization, memory mapping, and interfacing with ROM and RAM.

I/O Interface:

Basics of input and output interfacing with microprocessors and microcontrollers.

Various techniques for interfacing with devices such as LEDs, displays, keyboards, and sensors.

Serial and Parallel Communication:

Serial communication protocols like UART, USART.

Parallel communication techniques for data transfer.

Interrupts and Timers:

Understanding interrupt handling and timer/counters in microcontrollers.

Their significance in real-time systems.

Peripherals and Applications:

Applications of microcontrollers in embedded systems, automation, and control systems.

Interfacing with various peripherals and sensors.

Embedded C Programming:

Writing C programs for microcontrollers.

Embedded C concepts and development tools.

Microcontroller Interfacing and Projects:

Practical application of microcontroller knowledge through projects and hands-on experience.

Developing and implementing microcontroller-based systems.

Recent Advancements:

Awareness of recent developments in the field of microprocessors and microcontrollers.

Emerging technologies and trends.

It's important to note that the specific content and depth of coverage for microprocessors and microcontrollers may vary from one ESE exam to another, so candidates should refer to the official ESE syllabus provided by the conducting authority for the most accurate and up-to-date information. Studying these topics is essential for candidates looking to excel in the ESE examination, especially if they aim for jobs in fields related to electronics, communication, and embedded systems.

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B.Tech Back Paper Tuition In Noida For Microprocessor B.Tech Back Paper Tuition In Noida For Microprocessor Introduction to Microprocessor Tuition In Noida Introduction to Microprocessor and its applications, Microprocessor Evolution Tree, Microprocessor…

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Basic Understanding of 8086 Microprocessor

8086 Microprocessor

Hello, and welcome to my blog! Today I’m going to share with you some of my understanding of 8086 microprocessor, which is one of the most important and influential inventions in the history of computing.

The 8086 microprocessor was introduced by Intel in 1978 as the first 16-bit processor. It was designed to be compatible with the 8080 and 8085 processors, but with a much more powerful instruction set and architecture. The 8086 microprocessor had a 20-bit address bus, which allowed it to access up to 1 MB of memory. It also had a 16-bit data bus, which enabled it to perform arithmetic and logic operations on 16-bit operands.

The 8086 microprocessor had two modes of operation: real mode and protected mode. In real mode, the processor could only access the first 1 MB of memory using segment registers and offsets. In protected mode, the processor could access up to 16 MB of memory using a more complex mechanism involving selectors and descriptors. Protected mode also provided features such as memory protection, multitasking, and virtual memory.

The 8086 microprocessor was the basis for the x86 family of processors, which dominated the personal computer market for decades. The 8086 microprocessor was used in many popular computers such as the IBM PC, the Compaq Portable, and the original Macintosh. The 8086 microprocessor also inspired many other processors such as the Zilog Z8000, the Motorola 68000, and the ARM architecture.

If you are interested to understand more about the 8086 microprocessor, then you can go through the PiEmbSysTech 8086 microprocessor Tutorial Blog. If you have any questions or query, that you need to get answer or you have any idea to share it with the community, you can use Piest Forum.

The 8086 microprocessor was a remarkable achievement that revolutionized the field of computing. It paved the way for many innovations and applications that we take for granted today. I hope you enjoyed this brief overview of the 8086 microprocessor and learned something new. Thank you for reading my blog!

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Brief History Of The IA-32 Architecture, [12.1] IA-32 architecture can be traced back to: Intel 8085 and 8080 microprocessors. Intel 4004 microprocessor (the first microprocessor, designed by Intel in 1969). IA-32 architecture family contains both 16-bit processors and 32-bit processors. It was preceded by 16-bit processors including the 8086 processor and 8088 (more cost-effective version).

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Intel 8085: Microprocessor-Based Systems

#NeedToKnow: intel 8085

“Technology Motherboard” by Lenharth Systems/ CC0 1.0 The intel 8085 is an 8-bit microprocessor introduced by intel in 1976. It is part of the MCS-85 family and was widely used in early microprocessor-based systems. key features and aspects of intel 8085 01. Architecture: The 8085 follows a von Neumann Architecture, with a single set of address and data buses. It has a 16-bit address bus,…

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Microprocessors & Microcontrollers  Tuition Near Sector 52 Noida

Microprocessors & Microcontrollers  Tuition Near Sector 52 Noida

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8085 MICROPROCESSOR: History and Evolution of Microprocessor and their Classification, Architecture of 8085 Microprocessor, Address / Data Bus multiplexing and dem…

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Basic Understanding of 8085 Microprocessor

8085 Microprocessor

If you are interested in learning about the 8085 microprocessor, you have come to the right place. In this blog post, I will explain the basic architecture and features of this amazing device that was one of the first commercially successful microprocessors by Intel.

The 8085 microprocessor is an 8-bit device that operates on 8 bits of data at a time. It was created with NMOS technology in 1976 and can address up to 64KB of memory. It has a simple and elegant design that consists of the following functional units:

- Arithmetic and Logic Unit (ALU): This is the brain of the microprocessor that performs arithmetic and logical operations on 8-bit data, such as addition, subtraction, AND, OR, etc. - Accumulator: This is an 8-bit register that stores the result of the ALU operations. It also performs I/O and load/store operations with the memory and external devices. - Flag Register: This is an 8-bit register that indicates the status of the ALU operations by setting or clearing five flip-flops: Sign, Zero, Auxiliary Carry, Parity, and Carry. - General Purpose Registers: These are six 8-bit registers (B, C, D, E, H, L) that can store data or act as pointers to memory locations. They can also work in pairs to hold 16-bit data (BC, DE, HL). - Program Counter: This is a 16-bit register that holds the address of the next instruction to be executed. It is incremented by one or two after each instruction fetch. - Stack Pointer: This is a 16-bit register that points to the top of the stack in memory. The stack is used to store and retrieve data or return addresses during subroutine calls. - Instruction Register and Decoder: This is an 8-bit register that holds the fetched instruction from memory. The decoder decodes the instruction and generates control signals for the execution of the instruction. - Timing and Control Unit: This unit generates timing and control signals for the internal and external circuits of the microprocessor. It synchronizes the operations of the microprocessor with the clock frequency and external devices.

The 8085 microprocessor also supports five interrupt signals (INTR, RST 7.5, RST 6.5, RST 5.5, TRAP) that allow external devices to request service from the microprocessor. The microprocessor can respond to these requests by suspending the main program and executing a subroutine called an interrupt service routine (ISR).

If you are interested to understand more about the 8085 microprocessor, then you can go through the PiEmbSysTech 8085 microprocessor Tutorial Blog. If you have any questions or query, that you need to get answer or you have any idea to share it with the community, you can use Piest Forum.

Thank you for reading and happy learning!

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Addressing Modes Of 8086

Intel 8086

Intel 8086 microprocessor is the enhanced version of Intel 8085 microprocessor. It was designed by Intel in 1976.

The 8086 microprocessor is a16-bit, N-channel, HMOS microprocessor. Where the HMOS is used for 'High-speed Metal Oxide Semiconductor'.

Intel 8086 is built on a single semiconductor chip and packaged in a 40-pin IC package. The type of package is DIP (Dual Inline Package).

Intel 8086 uses 20 address lines and 16 data- lines. It can directly address up to 220 = 1 Mbyte of memory.

It consists of a powerful instruction set, which provides operation like division and multiplication very quickly.

8086 is designed to operate in two modes, i.e., Minimum and Maximum mode.

Difference between 8085 and 8086 Microprocessor

5) Stack Memory Addressing Mode. The stack memory addressing mode is used whenever you perform a push or pop operation. Always a word will be entered or popped from the stack in this addressing mode, and the value of the Stack Pointer (SP) will be incremented or decremented accordingly. The higher byte of data will be stored at SP-1 location. Addressing modes in 8086 microprocessor. The way of specifying data to be operated by an instruction is known as addressing modes. This specifies that the given data is an immediate data or an address. It also specifies whether the given operand is register or register pair. Click to see full answer.

8085 Microprocessor8086 MicroprocessorIt is an 8-bit microprocessor.It is a 16-bit microprocessor.It has a 16-bit address line.It has a 20-bit address line.It has a 8-bit data bus.It has a 16-bit data bus.The memory capacity is 64 KB.The memory capacity is 1 MB.The Clock speed of this microprocessor is 3 MHz. The Clock speed of this microprocessor varies between 5, 8 and 10 MHz for different versions.It has five flags.It has nine flags.8085 microprocessor does not support memory segmentation.8086 microprocessor supports memory segmentation.It does not support pipelining.It supports pipelining.It is accumulator based processor.It is general purpose register based processor.It has no minimum or maximum mode.It has minimum and maximum modes.In 8085, only one processor is used.In 8086, more than one processor is used. An additional external processor can also be employed.It contains less number of transistors compare to 8086 microprocessor. It contains about 6500 transistor.It contains more number of transistors compare to 8085 microprocessor. It contains about 29000 in size.The cost of 8085 is low.The cost of 8086 is high.

8086 pins configuration

The description of the pins of 8086 is as follows:

AD0-AD15 (Address Data Bus): Bidirectional address/data lines. These are low order address bus. They are multiplexed with data.

When these lines are used to transmit memory address, the symbol A is used instead of AD, for example, A0- A15.

A16 - A19 (Output): High order address lines. These are multiplexed with status signals.

A16/S3, A17/S4: A16 and A17 are multiplexed with segment identifier signals S3 and S4.

A18/S5: A18 is multiplexed with interrupt status S5.

A19/S6: A19 is multiplexed with status signal S6.

BHE/S7 (Output): Bus High Enable/Status. During T1, it is low. It enables the data onto the most significant half of data bus, D8-D15. 8-bit device connected to upper half of the data bus use BHE signal. It is multiplexed with status signal S7. S7 signal is available during T3 and T4.

RD (Read): For read operation. It is an output signal. It is active when LOW.

Ready (Input): The addressed memory or I/O sends acknowledgment through this pin. When HIGH, it denotes that the peripheral is ready to transfer data.

RESET (Input): System reset. The signal is active HIGH.

CLK (input): Clock 5, 8 or 10 MHz.

INTR: Interrupt Request.

NMI (Input): Non-maskable interrupt request.

TEST (Input): Wait for test control. When LOW the microprocessor continues execution otherwise waits.

VCC: Power supply +5V dc.

GND: Ground.

Operating Modes of 8086

There are two operating modes of operation for Intel 8086, namely the minimum mode and the maximum mode.

When only one 8086 CPU is to be used in a microprocessor system, the 8086 is used in the Minimum mode of operation.

In a multiprocessor system 8086 operates in the Maximum mode.

Pin Description for Minimum Mode

In this minimum mode of operation, the pin MN/MX is connected to 5V D.C. supply i.e. MN/MX = VCC.

The description about the pins from 24 to 31 for the minimum mode is as follows:

INTA (Output): Pin number 24 interrupts acknowledgement. On receiving interrupt signal, the processor issues an interrupt acknowledgment signal. It is active LOW.

ALE (Output): Pin no. 25. Address latch enable. It goes HIGH during T1. The microprocessor 8086 sends this signal to latch the address into the Intel 8282/8283 latch.

DEN (Output): Pin no. 26. Data Enable. When Intel 8287/8286 octal bus transceiver is used this signal. It is active LOW.

DT/R (output): Pin No. 27 data Transmit/Receives. When Intel 8287/8286 octal bus transceiver is used this signal controls the direction of data flow through the transceiver. When it is HIGH, data is sent out. When it is LOW, data is received.

M/IO (Output): Pin no. 28, Memory or I/O access. When this signal is HIGH, the CPU wants to access memory. When this signal is LOW, the CPU wants to access I/O device.

WR (Output): Pin no. 29, Write. When this signal is LOW, the CPU performs memory or I/O write operation.

HLDA (Output): Pin no. 30, Hold Acknowledgment. It is sent by the processor when it receives HOLD signal. It is active HIGH signal. When HOLD is removed HLDA goes LOW.

HOLD (Input): Pin no. 31, Hold. When another device in microcomputer system wants to use the address and data bus, it sends HOLD request to CPU through this pin. It is an active HIGH signal.

Pin Description for Maximum Mode

In the maximum mode of operation, the pin MN/¯MX is made LOW. It is grounded. The description about the pins from 24 to 31 is as follows:

QS1, QS0 (Output): Pin numbers 24, 25, Instruction Queue Status. Logics are given below:

QS1QS0Operation00No operation011st byte of opcode from queue.10Empty the queue11Subsequent byte from queue

S0, S1, S2 (Output): Pin numbers 26, 27, 28 Status Signals. These signals are connected to the bus controller of Intel 8288. This bus controller generates memory and I/O access control signals. Logics for status signal are given below:

S2S1S0Operation000Interrupt acknowledgement001Read data from I/O port010Write data from I/O port011Halt100Opcode fetch101Memory read110Memory write111Passive state

LOCK (Output): Pin no. 29. It is an active LOW signal. When this signal is LOW, all interrupts are masked and no HOLD request is granted. In a multiprocessor system all other processors are informed through this signal that they should not ask the CPU for relinquishing the bus control.

RG/GT1, RQ/GT0 (Bidirectional): Pin numbers 30, 31, Local Bus Priority Control. Other processors ask the CPU by these lines to release the local bus.

In the maximum mode of operation signals WR, ALE, DEN, DT/R etc. are not available directly from the processor. These signals are available from the controller 8288.

Functional units of 8086

8086 contains two independent functional units: a Bus Interface Unit (BIU) and an Execution Unit (EU).

Fig: Block Diagram of Intel 8086 Microprocessor (8086 Architecture)

Bus Interface Unit (BIU)

The segment registers, instruction pointer and 6-byte instruction queue are associated with the bus interface unit (BIU).

The BIU:

Handles transfer of data and addresses,

Fetches instruction codes, stores fetched instruction codes in first-in-first-out register set called a queue,

Reads data from memory and I/O devices,

Writes data to memory and I/O devices,

It relocates addresses of operands since it gets un-relocated operand addresses from EU. The EU tells the BIU from where to fetch instructions or where to read data.

It has the following functional parts:

Instruction Queue: When EU executes instructions, the BIU gets 6-bytes of the next instruction and stores them in the instruction queue and this process is known as instruction pre fetch. This process increases the speed of the processor.

Segment Registers: A segment register contains the addresses of instructions and data in memory which are used by the processor to access memory locations. It points to the starting address of a memory segment currently being used. There are 4 segment registers in 8086 as given below:

Code Segment Register (CS): Code segment of the memory holds instruction codes of a program.

Data Segment Register (DS): The data, variables and constants given in the program are held in the data segment of the memory.

Stack Segment Register (SS): Stack segment holds addresses and data of subroutines. It also holds the contents of registers and memory locations given in PUSH instruction.

Extra Segment Register (ES): Extra segment holds the destination addresses of some data of certain string instructions.

Instruction Pointer (IP): The instruction pointer in the 8086 microprocessor acts as a program counter. It indicates to the address of the next instruction to be executed.

Execution Unit (EU)

The EU receives opcode of an instruction from the queue, decodes it and then executes it. While Execution, unit decodes or executes an instruction, then the BIU fetches instruction codes from the memory and stores them in the queue.

The BIU and EU operate in parallel independently. This makes processing faster.

General purpose registers, stack pointer, base pointer and index registers, ALU, flag registers (FLAGS), instruction decoder and timing and control unit constitute execution unit (EU). Let's discuss them:

General Purpose Registers: There are four 16-bit general purpose registers: AX (Accumulator Register), BX (Base Register), CX (Counter) and DX. Each of these 16-bit registers are further subdivided into 8-bit registers as shown below:

16-bit registers8-bit high-order registers8-bit low-order registersAXAHALBXBHBLCXCHCLDXDHDL

Index Register: The following four registers are in the group of pointer and index registers:

Stack Pointer (SP)

Base Pointer (BP)

Source Index (SI)

Destination Index (DI)

ALU: It handles all arithmetic and logical operations. Such as addition, subtraction, multiplication, division, AND, OR, NOT operations.

Flag Register: It is a 16?bit register which exactly behaves like a flip-flop, means it changes states according to the result stored in the accumulator. It has 9 flags and they are divided into 2 groups i.e. conditional and control flags.

Conditional Flags: This flag represents the result of the last arithmetic or logical instruction executed. Conditional flags are:

Carry Flag

Auxiliary Flag

Parity Flag

Zero Flag

Sign Flag

Overflow Flag

Control Flags: It controls the operations of the execution unit. Control flags are:

Trap Flag

Interrupt Flag

Direction Flag

Interrupts

Interrupt is a process of creating a temporary halt during program execution and allows peripheral devices to access the microprocessor.

Microprocessor responds to these interrupts with an interrupt service routine (ISR), which is a short program or subroutine to instruct the microprocessor on how to handle the interrupt.

There are different types of interrupt in 8086:

Hardware Interrupts

Hardware interrupts are that type of interrupt which are caused by any peripheral device by sending a signal through a specified pin to the microprocessor.

The Intel 8086 has two hardware interrupt pins:

NMI (Non-Maskbale Interrupt)

INTR (Interrupt Request) Maskable Interrupt.

NMI: NMI is a single Non-Maskable Interrupt having higher priority than the maskable interrupt. Imovie 9 download mac.

It cannot be disabled (masked) by user using software.

It is used by the processor to handle emergency conditions. For example: It can be used to save program and data in case of power failure. An external electronic circuitry is used to detect power failure, and to send an interrupt signal to 8086 through NMI line.

INTR: The INTR is a maskable interrupt. It can be enabled/disabled using interrupt flag (IF). After receiving INTR from external device, the 8086 acknowledges through INTA signal.

It executes two consecutive interrupt acknowledge bus cycles.

Software Interrupt

A microprocessor can also be interrupted by internal abnormal conditions such as overflow; division by zero; etc. A programmer can also interrupt microprocessor by inserting INT instruction at the desired point in the program while debugging a program. Such an interrupt is called a software interrupt.

Addressing Modes Of 8086 Video Lectures

The interrupt caused by an internal abnormal conditions also came under the heading of software interrupt.

Example of software interrupts are:

TYPE 0 (division by zero)

TYPE 1 (single step execution for debugging a program)

TYPE 2 represents NMI (power failure condition)

TYPE 3 (break point interrupt)

TYPE 4 (overflow interrupt)

Interrupt pointer table for 8086

Fig: Interrupt pointer table for 8086

The 8086 can handle up to 256, hardware and software interrupts.

1KB memory acts as a table to contain interrupt vectors (or interrupt pointers), and it is called interrupt vector table or interrupt pointer table. The 256 interrupt pointers have been numbered from 0 to 255 (FF hex). The number assigned to an interrupt pointer is known as type of that interrupt. For example, Type 0, Type 1, Type 2,......Type 255 interrupt.

Addressing modes of 8086

The way for which an operand is specified for an instruction in the accumulator, in a general purpose register or in memory location, is called addressing mode.

The 8086 microprocessors have 8 addressing modes. Two addressing modes have been provided for instructions which operate on register or immediate data.

These two addressing modes are:

Register Addressing: In register addressing, the operand is placed in one of the 16-bit or 8-bit general purpose registers.

Example

MOV AX, CX

ADD AL, BL

ADD CX, DX

Immediate Addressing: In immediate addressing, the operand is specified in the instruction itself.

Example

MOV AL, 35H

MOV BX, 0301H

MOV (0401), 3598H

ADD AX, 4836H

The remaining 6 addressing modes specify the location of an operand which is placed in a memory.

These 6 addressing modes are:

Direct Addressing: In direct addressing mode, the operand?s offset is given in the instruction as an 8-bit or 16-bit displacement element.

Example

ADD AL, (0301)

The instruction adds the content of the offset address 0301 to AL. the operand is placed at the given offset (0301) within the data segment DS.

Register Indirect Addressing: The operand's offset is placed in any one of the registers BX, BP, SI or DI as specified in the instruction.

Example

MOV AX, (BX)

It moves the contents of memory locations addressed by the register BX to the register AX.

Based Addressing: The operand's offset is the sum of an 8-bit or 16-bit displacement and the contents of the base register BX or BP. BX is used as base register for data segment, and the BP is used as a base register for stack segment.

Effective address (Offset) = (BX + 8-bit or 16-bit displacement).

Example

MOV AL, (BX+05); an example of 8-bit displacement.

MOV AL, (BX + 1346H); example of 16-bit displacement.

Indexed Addressing: The offset of an operand is the sum of the content of an index register SI or DI and an 8-bit or 16-bit displacement.

Offset (Effective Address) = (SI or DI + 8-bit or 16-bit displacement)

Example

MOV AX, (SI + 05); 8-bit displacement.

MOV AX, (SI + 1528H); 16-bit displacement.

Based Indexed Addressing: The offset of operand is the sum of the content of a base register BX or BP and an index register SI or DI.

Effective Address (Offset) = (BX or BP) + (SI or DI)

Here, BX is used for a base register for data segment, and BP is used as a base register for stack segment.

Example

ADD AX, (BX + SI)

MOV CX, (BX + SI)

Based Indexed with Displacement: In this mode of addressing, the operand's offset is given by:

Effective Address (Offset) = (BX or BP) + (SI or DI) + 8-bit or 16-bit displacement

Example

MOV AX, (BX + SI + 05); 8-bit displacement

MOV AX, (BX + SI + 1235H); 16-bit displacement

Next TopicInstruction Set of 8086

Register Addressing

In register addressing the instruction will specify the name of the register which holds the data to be operated by the instruction.

Immediate Addressing

Addressing Modes Of 8086 With Examples

In immediate addressing mode an 8-bit or 16-bit data is specified as part of the instruction.

Direct Addressing

In direct addressing an unsigned 16-bit displacement of signed 8-bit displacement will be specified in the instruction.The displacement is the effective address(EA) or offset.The 20 bit physical address of memory is calculated by multiplying the content of DS register by 10H and adding to effective address.In case of 8-bit displacement, the effective address is obtained by sign extending the 8-bit displacement to 16-bit.

The segment base address (BA) is computed by multiplying the content of DS by 16(base 10)The memory address (MA) is computed by adding the effective address (EA) to the segment base address (BA)

Register Indirect Addressing

In register indirect adddressing the name of the register which holds the effective address(EA)will be specified in the instructionThis addressing mode allows data to be addressed at any memory location through an offset address held in any of the following registers: BP, BX, DI & SI.

Addressing Modes Of 8086 Pdf

This instruction moves a word from the address pointed by BX and BX + 1 in data segment into CL and CH respectively.

Based Addressing Mode

Addressing Modes Of 8086 In Hindi

In this addressing mode, the offset address of the operand is given by the sum of contents of the BX/BP registers and 8-bit/16-bit displacement.

Indexed Addressing Mode

In this addressing mode, the operands offset address is found by adding the contents of SI or DI register and 8-bit/16-bit displacements.

Addressing Modes Of 8086 Microprocessor

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300+ TOP EMBEDDED SYSTEMS LAB VIVA Questions and Answers

EMBEDDED SYSTEMS LAB VIVA Questions :-

1. What is an embedded system? An embedded system is a special purpose computer system which is completely encapsulated by device it control. It is a programmed hardware device in which the hardware chip is programmed with specific function. It is a combination of hardware and software. 2. What are the characteristics of embedded system? The Characteristics of the embedded systems are as follows- Sophisticated functionality Real time behavior Low manufacturing cost Low power consumption User friendly Small size 3. What are the types of embedded system? They are of 4 types General computing Control System Digital Signal Processing Communication and network 4. What is digital signal controller ? DSC is 16 bit RISC machine that combines control advantages of micro-controller and digital signal processing to produce tightly coupled single chip-single instruction stream solution for embedded system design. 5. What are the components of embedded system? Microcontroller, microprocessor, DSC, DSP, busses, system clock, Read only Memory(ROM), RAM, Real time clock these are the components of embedded system. 6. Why we use embedded systems? Embedded systems avoid lots of electronic components and they have rich built in functionality. They reduces the cost and maintenance cost and the probability of failure of embedded system is less so embedded system are in very much use now a days. 7. What are the languages used in embedded system? Assembly language and C are basically used for embedded system. Java and ADA are also preferred. 8. How does combination of functions reduce memory reuirement in embedded system? By using functions the amount of code that has to be dealt with is reduced thus redundancy is eliminated for everything common in function. 9. What is the significance of watchdog timer in ES? It is a timing device which is set to predefined time interval and some task is to be performed at that time. It is used to reset original state when an inappropriate event take place.It is usually operated by counter device. 10. What is the difference between mutexes and semaphores? Semaphores are the synchronization tool to overcome critical section problem. Mutex is also a tool that is used to provide deadlock free mutual exclusion. It protects access to every critical data item, if the data is locked and is in use,it either waits for the thread to finish or awakened to release the lock from its inactive state. 11. What is the difference between FIFO and the memory? FIFO (first in first out) is a memory structure where data’s can be stored and retrieved. This is a ueue where memory is a storage device which can hold data’s dynamically or at any desired locations and can be retrieved in any order. 12. What is an anti-aliasing filter? Anti-aliasing filter reduces errors due to aliasing. 13. How to implement a fourth order Butter worth LP filter at 1 KHz if sampling freuency is 8 KHz? A fourth order butter worth filter can be made as cascade of two second order LP filters with zeta of 0.924 and 0.383. One can use a bilinear transformation approach for realising second order LP filters. Using this techniue described well in many texts, one can make second order LP filters and cascade them 14. Is 8085 an embedded system? It’s not an embedded system. B’coz it will be a part of an embedded system and it does not work on any software. 15.What is the role of segment register? In the 8086 processor architecture, memory addresses are specified in two parts called the segment and the offset. Segment values are stored in the segment registers. There are four or more segment registers: Code Segment (CS) contains segment of the current instruction (IP is the offset), Stack segment (SS) contain stack of the segment (SP is the offset), DS is the segment used by default for most data operations; ES is an extra segment register. 16.What type of registers contains an INTEL CPU? Special function registers like accumulator, program controller (PC), data pointer (DPTR), TMOD and TCON (timing registers), 3 register banks with r0 to r7, Bit addressable registers like B. 17. What is the difference between microprocessor and micro controller? Microprocessor is managers of the resources (I/O, memory) which lie out-side of its architecture. Micro controllers have I/O, memory etc. built into it and specifically designed for control. 18. DMA deals with which address (physical/virtual addresses)? DMA deals with physical addresses. DMA controller is a device which directly drives the data and address bus during data transfer. So it is purely physical address. 19. What is the difference between testing and verification? Verification is a front end process and testing is a post silicon process. Verification is to verify the functionality of the design during the design cycle. Testing is find manufacturing faults. EMBEDDED SYSTEMS LAB VIVA Questions and Answers Read the full article

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Microprocessor 8085 Architecture

Microprocessor 8085 Architecture which is shown in the below figure consists of various units and each unit has its respective functionality.

Fig: 8085 Microprocessor Architecture

These units are listed below-

1 Accumulator

In Intel 8085microprocessor, accumulator acts an 8-bit register to store 8-bit data to perform arithmetic and logical operation on them. The final result stored in the…

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Where can I Find the Best Assembly Language Assignment Help?

Despite many high-level programming languages being introduced into the world of computer science today, the assembly language still manages to secure its place. Many Australian institutions and universities have included assembly language as a part of their curriculum. The wannabe programmers can learn a lot more about computation and computer hardware implementations through this language. But since the practical implementations of the assembly language are not so prevalent, students look for assignment assistance in this subject.

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The assembly language is also known as symbolic language as it uses mnemonics and symbols in its instructions. The language is really powerful and can give you a good knowledge about how the CPU works. You can learn the whole architecture of the computer memory and the process by which various instructions get executed in the CPU. The subject is quite dense as it combines the computer architecture and addressing formats as well. But if you want to understand the computing world from its beginning then you should consider learning this language. For those who want to study further about microprocessors also, assembly language can form the building block for them. Here is a list of some assembly language assignment topics that we cover:

1.    Microcontrollers

2.    Registers

3.    Opcodes

4.    Assembly Language syntax

5.    Memory management

6.    Addressing Modes

7.    System Calls

8.    Macros

9.    Assemblers

10.    Compilers

11.    Boolean Algebra

12.    Arithmetic instructions

13.    CPU organization

14.    MIPS, ARM

15.    Interrupts

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UGC NET Computer Science and Applications Syllabus 2018

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UGC NET Computer Science and Applications Syllabus 2018

UGC NET Computer Science and Applications Syllabus 2018

UNIVERSITY GRANTS COMMISSION NET BUREAU Code No. : 87 Subject: COMPUTER SCIENCE AND APPLICATIONS

SYLLABUS Note: There will be two question papers, Paper-II and Paper-Ill (Part-A & B). Paper-II will cover 50 Objective Type Questions (Multiple choice, Matching type, True/False, Assertion-Reasoning type) carrying 100 marks. Paper’-Ill will have two Parts-A and B: Paper-iii (A) will have 10 short essay type questions (300 words) carryIng 16 marks each. In it there will be one question with Internal choice from each unit (i.e. 10 questions from 10 units: Total marks will be 160). Paper-III (B) will be compulsory and there will be one question from each of the Electives. The candidate will attempt only one question (one elective only In 800 words) carrying 40 marks. Total marks of Paper-III will be 200.

Best book for UGC NET Computer Science and Applications

  UGC NET Computer Science and Applications Syllabus 2018

PAPER-II

1. Discrete Structures

Sets, Relations, Functions. Pigeonhole Principle, Inclusion-Exclusion Principle, Equivalence and Partial Orderings, Elementary Counting Techniques, Probability. Measure(s) for Information and Mutual Information. Computability: Models of computation—Finite Automata, Pushdown Automata, Non-determinism and NFA. DPDA and PDAs and Languages accepted by these structures. Grammars, Languages, Non-computability and Examples of non-computable problems. Graph: DefInition, walks, paths, trails, connected graphs, regular and bipartite graphs, cycles and circuits. Tree and rooted tree. Spanning trees. Eccentricity of a vertex radius and diameter of a graph. Central Graphs. Centre(s) of a tree. Hamiltonlan and Eulerlan graphs, Planar graphs. Groups: Finite fields and Error correcting/detecting codes.

2. Computer Arithmetic

Propositional (Boolean) Logic, Predicate Logic, Well-formed-formulae (WFF), Satisfiability and Tautology. Logic Families : TTl, ECL and C-MOS gates. Boolean algebra and Minimization of Boolean functions, Flip-flops—-types, race condition and comparison. Design of computational and sequential circuits. Representation of Integers: Octal, Hex. Decimal, and Binary. 2’s complement and l’s complement arithmetic. Floating point representation.

3. Programming in C and C++

Programming in C: Elements of C—Tokens, Identifiers, data types In C. Control structures In C. Sequence, selection and Iteration(s). Structured data types In C—arrays, struct, union, string, and pointers, 0-0 Programming Concepts : Class, object, instantiation. Inheritance, polymorphism and overloading. C++ Programming : Elements of C++ —Tokens, identifiers. Variables and constants, Data types, Operators, Control statements. Functions parameter passing. Class and objects. Constructors and destructors. Overloading, Inheritance, Templates, Exception handling.

4. Relational Database Design and SQL

E-R diagrams and their transformation to relational design, normalizatlon—1NF, 2NF. 3NF, BCNF and 4NF. Limitations of 4NF and BCNF. SQL: Data Definition Language (DDL), Data Manipulation Language (DML), Data Control Language (DCL) commands. Database objects like—Views, Indexes, sequences, synonyms, data dictionary.

5. Data and File structures

Data, Information, Definition of data structure. Arrays, stacks, queues, linked lists, trees, graphs, priority queues and heaps. File Structures: Fields, records and files. Sequential, direct, Index-sequential and relative files. Hashing, inverted lists and multi-lists. B trees and B trees. 6. Computer Networks Network fundamentals : Local Area Networks (LAN). Metropolitan Area Networks (MAN), Wide Area Networks (WAN), Wireless Networks, Inter Networks. Reference Models : The OSI model, TCP/IP model.

Data Communication: Channel capacity. Transmission media—twisted pair, coaxial cables, fibre-optic cables, wireless transmission—radio, microwave, infrared and millimeter waves. Lightwave transmission. Thelephones—local loop, trunks, multiplexing, switching, narrowband ISDN, broadband ISDN, ATM. High speed LANS. Cellular adio. Communication satellites—geosynchronous and low-orbit. Intemetworking: Switch/Hub, Bridge, Router, Gateways, Concatenated virtual circuits, Tunnelling. Fragmentation, Firewalls. Routing : Virtual circuits and datagrams. Routing algorithms. Conjestion control. Network Security: Cryptography—public key, secret key. Domain Name System (DNS)—Electronic Mail and Worldwide Web (WWW). The DNS, Resource Records, Name servers. E-mail-architecture and Serves. 7. System Software and Compilers Assembly language fundamentals (8085 based assembly language programming). Assemblers—2-pass and single-pass. Macros and macroprocessors. Loading, linking, relocation, program relocatabifity. Linkage editing. Text editors. Programming Environments. Debuggers and program generators. Compilation and Interpretation. Bootstrap compilers. Phases of compilation process. Lexical analysis. Lex package on Unix system. Context free grammars. Parsing and parse trees. Representation of parse (derivation) trees as rightmost and leftmost derivations. Bottom up parsers—shift-reduce. operator precedence, and LR. YACC package on Unix system. Topdown parsers—left recursion and its removal. Recursive descent parser. Predictive parser, Intermediate codes—Quadruples, Triples. Intermediate code generation, Code generation, Code optimization. 8. Operating Systems (with Case Study of Unix) Main functions of operating systems. Multiprogramming. multiprocessing, and multitasking. Memory Management: Virtual memory, paging, fragmentation. Concurrent Processing: Mutual exclusion. Critical regions, lock and unlock. Scheduling: CPU scheduling. I/O scheduling, Resource scheduling, Deadlock and scheduling algorithms. Banker’s algorithm for deadlock handling.

UMX The Unix System: File system, process management. bourne shell, shell variables, command line programming. Filters and Commands: Pr, head, tail, cut, paste, sort, unlq. tr, join. etc., grep, egrep, fgrep, etc., sed, awk, etc. System Calls (like): Creat, open, close, read, write, Iseek, link, unlink, stat, fstat, umask, chmod. exec, fork, wait, system. 9. Software Engineering System Development Life Cycle (SDLC): Steps, Water fall model, Prototypes. Spiral model. Software Mefrics: Software Project Management. Software Design: System design, detailed design, function oriented design, object oriented design, user interface design. Design level metrics. Coding and Testing : Testing level metrics. Software quality and reliability. Clean room approach, software reengineering. 10. Current Trends and Technologies The topics of current interest In Computer Science and Computer Applications shall be covered. The experts shall use their judgement from time to time to Include the topics of popular Interest, which are expected to be known for an application development software professional, currently, they include Parallel Computing Parallel virtual machine (pvm) and message passing interface (mpi) libraries and calls. Advanced architectures. Today’s fastest computers. Mobile Contputing Mobile connectivity—CeUs, Framework, wireless delivery technology and switching methods, mobile Information access devices, mobile data internetworking standards, cellular data communication protocols, mobile computing applications. Mobile databases—protocols, scope, tools and technology. M-business. E-Technologies Electronic Commerce : Framework, Media Convergence of Applications, Consumer Applications. Organisation Applications.

Electronic Payment Systems: Digital Token, Smart Cards, Credit Cards, Risks In Electronic Payment System, Designing Electronic Payment Systems. Electronic Data Interchwige (EDI) : Concepts, Applications, (Legal, Security and Privacy) Issues, EDT and Electronic Commerce, Standardization and EDT, EDI Software Implementation, EDT Envelope for Message Transport, Internet-Based EDI. Digital Libraries and Data Warehousing: Concepts. Types of Digital documents, Issues behind document Infrastructure, Corporate Data Warehouses. Software Agents : Characteristics and Properties of Agents, Technology behind Software Agents (Applets, Browsers and Software Agents) Broadband Telecommunications: Concepts, Frame Relay, Cell Relay, Switched Multlmegablt Data Service. Asynchronous Transfer Mode. Main concepts In Geographical Information System (GIS), E-cash, E-Buslness, ERP packages. Data Warehousing: Data Warehouse environment, architecture of a data warehouse methodology, analysis, design, construction and administration. Data Mining: Extracting models and patterns from large databases, data mining techniques, classification, regression, clustering, summarization, dependency modelling, link analysis, sequencing analysis, mining scientific and business data. Windows Programming Introduction to Windows programmlng—W1n32, Microsoft Foundation Classes (MFC), Documents and views, Resources, Message handling in windows. Simple Applications (in windows) Scrolling, splitting views, docking toolbars. status bars, common dialogs. Advanced Windows Programming Multiple Document Interface (MDI), Multithreading. Object linking and Embedding (OLE). Active X controls. Active Template Library (Am). Network programming.

Best book for UGC NET Computer Science and Applications

UGC NET Computer Science and Applications Syllabus 2018

PAPER-III(A) CORE GROUP

Unit—I Combinational Circuit Design. Sequential Circuit Design. Hardwlred and Microprogrammed processor design. Instruction formats, Addressing modes. Memory types and organisation, Interfacing peripheral devices, Interrupts. Microprocessor architecture. Instruction set and Programming (8085, p-Iu/P-IV). Microprocessor applications. Unit—Il Database Concepts. ER diagrams, Data Models, Design of Relational Database. NormalisatiOfl, SQL and QBE. Query Processing and Optimisatlon. Centralised and Distributed Database, Security. Concurrency and Recovery In Centra]lsed and Distributed Database Systems. Object Oriented Database Management Systems (Concepts. Composite objects, Integration with RDBMS applications), ORACLE. Unit—Ill Display systems, Input devices, 2D Geometry, Graphic operations. 3D Graphics. Animation. Graphic standard, Applications. Concepts. Storage Devices. Input Tools, Authoring Tools. Application. Files. Unlt—IV Programming language concepts, paradigms and models. Data. Data types, Operators, Expressions, Assignment. Flow of Control—Control structures. I/O statements, User-defined and built-in functions, Parameter passing. Principles, classes, Inheritance, class hierarchies, polymorphism. dynamic binding, reference semantics and their implementation. Principles, functions, lists, types and polymorphisms. higher order functions, lazy evaluation, equations and pattern matching. Principles, horn clauses and their execution, logical variables, relations, data structures, controlling the search order, program development In prolog, implementation of prolog. example programs In prolog.

Principles of parallelism, coroutines, communication and execution. Parallel Virtual Machine (PVM) and Message Passing Interface (MPI) routines and calls. Parallel programs In PVM paradigm as well as MPI paradigm for simple problems like matrix multiplication. Preconditions, post-conditions, axiomatic approach for semantics, correctness, denotationa] semantics. Compiler structure, compiler construction tools, compilation phases. Finite Automata, Pushdown Automata. Non-determinism and NFA. DPDA, and PDAS and languages accepted by these structures. Grammars, Languages—types of grammars—type 0, type 1, type 2, and type 3. The relationship between types of grammars, and finite machines. Pushdown automata and Context Free Grammars. Lexical Analysis—regular expressions and regular languages. LEX package on Unix. Conversion of NFA to DFA. Minimizing the number of states In a DFA. Compilation and Interpretation. Bootstrap compilers. Context free grammars. Parsing and parse trees. Representation of parse (derivation) trees as rightmost and leftmost derivations. Bottom up parsers—shift-reduce, operator precedence, and LR. YACC package on Unix system. Topdown parsers—left recursion and its removal. Recursive descent parser. Predictive parser, Intermediate codes—Quadruples, triples. Intermediate code generation, code generation. Code optimization. Unit—V Analog and Digital transmission, Asynchronous and Synchronous transmission, Transmission media, Multiplexing and Concentration, Switching techniques, Polling. Topologies, Networking Devices, OS Reference Model, Protocols for—(i) Data link layer, (Ii) Network layer, and (lii) Transport layer. TCP/IP protocols, Networks security. Network administration. Unit—VI – Definition, Simple and Composite structures, Arrays. Lists. Stacks queues, Priority queues. Binary trees, B-trees, Graphs. Sorting and Searching Algorithms, Analysis of Algorithms, Interpolation and Binary Search. Asymptotic notations—big ohm, omega and theta. Average case analysis of simple programs like finding of a maximum of rt elements. Recursion and its systematic removal. Quicksort—Non-recursive implementation with minimal stack storage. Design of Algorithms (Divide and Conquer. Greedy method. Dynamic programming, Back tracking, Branch and Bound). Lower bound theory, Non-deterministic algorithm—Non-deterministic programming constructs. Simple non-deterministic programs. NP—hard and NP—complete problems.

Unit—VII Object, messages, classes, encapsulation. Inheritance, polymorphism. aggregation, abstract classes, generalization as extension and restriction. Object oriented design. Multiple inheritance, metadata. HTML. DHTML, XML, Scripting. Java, Servelets. Applets. Unit—VIII Software development models. Requirement analysis and specifications. Software design. Programming techniques and tools. Software validation and quality assurance techniques. Software maintenance and advanced concepts. Software management. Unit—IX Introduction. Memory management. Support for concurrent process, Scheduling. System deadlock, Multiprogramming system. I/O management, Distributed operating systems. Study of Unix and Windows NT. Unit—X Definitions, Al approach for solving problems. Automoted Reasonthg with propositional logic and predicate logic—fundamental proof procedure. refutation, resolution, refinements to resolution (ordering! prunlngf restriction strategies). State space representation of problems. bounding functions, breadth first, depth first, A. A’. A0, etc. Performance comparison of various search techniques. Frames, scripts, semantic nets, production systems. procedural representations. Prolog programming. Components of an expert system. Knowledge representation and Acquisition techniques. Building expert system and Shell. RTNs, ATNs, Parsing of Ambiguous CFGs. Tree Adjoining Grammars CrAGs). Systems approach to planning. Designing. Development, Implementation and Evaluation of MIS. Decision-making processes. evaluation of DSS, Group decision support system and case studies, Adaptive design approach to DSS development. Cognitive style in DSS. Integrating expert and Decision support systems.

UGC NET Computer Science and Applications Syllabus 2018

PAPER-III(B) ELECTIVE/OPTIONAL

Elective—I Theory of Computation : Formal language. Need for formal computational models, Non-computational problems, diagonal argument and Russel’s paradox. Deterministic Finite Automaton (DFA), Non-deterministic Finite Automaton (NFA), Regular languages and regular sets, Equivalence of DFA and NFA. Minimizing the number of states of a DFA. Non-regular languages, and Pumping lemma. Pushdown Automaton (PDA), Deterministic Pushdown Automaton (DPDA). Non-equfivalence of PDA and DPDA. Conteict free Grammars: Greibach Normal Form (GNF) and Chomsky Normal Form (CNF), Ambiguity. Parse Tree Representation of Derivations. Equivalence of PDA’s and CFG’s. Parsing techniques for parsing of general CFG’s—Early’s, Cook-Kassarni-Younger (CKY). and Tomita’s parsing. Linear Bounded Automata (LBA): Power of LBA. Closure properties. Thring Machine (1M): One tape, multitape. The notions of thne and space complexity in terms of TM. Construction of TM for simple problems. Computational complexity. Chonzsky Hierarchy of languages : Recursive and recursively-enumerable languages.

Elective—II Models for Information Channel : Discrete Memoryless Channel, Binary Symmetric Channel (BSC). Burst Channel. Bit-error rates. Probabffity, Entropy and Shannon’s measure of Information. Mutual information. Channel capacity theorem. Rate and optimality of Information transmission. Variable Length Codes: Prefix Codes, Huffmann Codes, Lempel-Ziev (12) Codes. Optimality of these codes. Information content of these codes. Error Correcting and Detecting Codes: Finite fields, Hamming distance, Bounds of codes, Linear (Parity Check) codes. Parity check matrix. Generator matrix, Decoding of linear codes, Hamming codes. Image Processing: Image Registration, Spatial Fourier Transforms, Discrete Spatial (2-dimensional) Fourier Transforms, Restoration, Lossy Compression of Images (pictures). Data Compression Techniques: Representation and compression of text, sound, picture, and video flies (based on the JPEG and MPEG standards).

Elective—Ill Linear Programming Problem (LPP) in the standard form, LPP In Canonical form. Conversion of LPP in Standard form to LPP in Canonical form. Simplex—Prevention of cyclic computations In Simplex and Tableau, Big-M method, dual simplex and revised simplex. Complexity of simplex algorithm(s). Exponential behaviour of simplex. Ellpso1d method and Karmakar’s method for solving LPPs. Solving simple LPPs through. these methods. Comparison of complexity of these methods. Assignment and Thmsportatlon Problems: Simple algorithms like Hungarian method, etc. Shortest Path Problems: DiJkstra’s and Moore’s method. Complexity. Network Flow Problem: Formulation. Max-Flow Mm-Cut theorem. Ford and Fulkerson’s algorithm. Exponential behaviour of Ford and Fulkerson’s algorithm. Ma1hotraPramodkumar-MaheShw (MPM) Polynomial algorithm for solving Network flow problem. Bipartite Graphs and Matchings: Solving matching problems using Network flow problems. Matroids: Definition. Graphic and Cographic matrolds. Matroid Intersection problem. Non-linear Programming : Kuhn-Tucker conditions. Convex functions and Convex regions. Convex programming problems. Algorithms for solving convex programming problems—Rate of convergence of iterative methods for solving these problems. Elective—IV Neuro.L Networks: Perceptron model. Linear separability and XOR problem. Two and three layered neural nets. BackpropagatiOfl_COflVergeflce. HopfIeld nets. Neural net learning. Applications. Fuzzy Systems: Definition of a Fuzzy set, Fuzzy relations, Fuzzy functions, Fuzzy measures, Fuzzy reasoning. Applications of Fuzzy systems. Elective-V Unix : Operating System. Structure of Unix Operating System. Unix Commands. Interfacing with Unix. Editors and Compilers for Unix, L,EX and YACC, File system. System calls. Filters. Shell programming. Windows : Windows environment, Urticode. Documents and Views. Drawing in a window, Message handling. Scrolling and Splitting views, Docking toolbars and Status bars, Common dialogs and Controls, MDI. Multlthreadlng. OLE, Active X controls, ATh. Database access, Network programming.

UGC NET Computer Science and Applications Syllabus 2018-DOWNLOAD

Best book for UGC NET Computer Science and Applications

UGC NET Computer Science and Applications Syllabus 2018